|
2022-07-15 10:50:00
diff --git a/components/net/dhcpd/dhcpd.c b/components/net/dhcpd/dhcpd.c
index d4eb5225e05117b17f353fdff4d1bb23a16c06c5..38edfaef6edcc12afd2d20924fde4d1e93957ac8 100644
--- a/components/net/dhcpd/dhcpd.c
+++ b/components/net/dhcpd/dhcpd.c
@@ -20,16 +20,23 @@ struct raw_msg {
int socket_fd;
};
+typedef enum {
+ DHCPD_TASK_NOT_CREATED = 0,
+ DHCPD_TASK_IS_CREATED,
+ DHCPD_TASK_IS_RUNNING,
+ DHCPD_TASK_SIGNAL_EXIT,
+} dhcpd_flag_e;
+
typedef struct dhcpd_ctrl{
OS_Thread_t dhcpd_thr;
int dhcp_socket;
- int flag;
+ volatile dhcpd_flag_e flag;
server_config_t server_config;
dhcpd_ip_item_t ip_pool[DHCPD_IP_POOL_SIZE];
struct raw_msg msg;
} dhcpd_ctrl_t;
-static dhcpd_ctrl_t g_dhcpd_ctrl = {0,};
+static dhcpd_ctrl_t g_dhcpd_ctrl = {0, -1, DHCPD_TASK_NOT_CREATED, };
static void dhcpd_handle_msg(struct raw_msg *msg);
static void dhcpd_close_socket(int *dhcp_socket);
@@ -68,7 +75,6 @@ static void dhcpd_task( void *pvParameters )
if((dhcpd->dhcp_socket = socket(AF_INET, SOCK_DGRAM, 0)) < 0) {//216Byte
DHCPD_ERR("Cannot open the socket!\r\n");
- dhcpd_close_socket(&dhcpd->dhcp_socket);
goto out;
}
@@ -82,7 +88,6 @@ static void dhcpd_task( void *pvParameters )
if(bind(dhcpd->dhcp_socket, (struct sockaddr*)&server_address, sizeof(server_address)) < 0) {
DHCPD_ERR("Cannot bind the socket with the address!\r\n");
- dhcpd_close_socket(&dhcpd->dhcp_socket);
goto out;
}
DHCPD_PRINTF("dhcpd_task start...\r\n");
@@ -95,7 +100,9 @@ static void dhcpd_task( void *pvParameters )
msg->sockaddr_from.sin_addr.s_addr = htonl(INADDR_ANY);
msg->socket_fd = dhcpd->dhcp_socket;
- while(dhcpd->flag)
+ dhcpd->flag = DHCPD_TASK_IS_RUNNING;
+
+ while(dhcpd->flag == DHCPD_TASK_IS_RUNNING)
{
FD_ZERO(&read_set);
FD_SET(dhcpd->dhcp_socket, &read_set);
@@ -156,6 +163,7 @@ out:
dhcpd->msg.send_buff = NULL;
}
+ dhcpd->flag = DHCPD_TASK_NOT_CREATED;
OS_ThreadDelete(&(dhcpd->dhcpd_thr));
OS_ThreadSetInvalid( &(dhcpd->dhcpd_thr) );
return;
@@ -175,10 +183,10 @@ int dhcpd_start(void)
dhcpd_ip_item_t *ip_item = NULL;
uint8_t ip_addr1, ip_addr2, ip_addr3, ip_addr4;
- if(dhcpd->flag == LN_TRUE){
- return DHCPD_ERR_STATE;
- }
- dhcpd->flag = LN_TRUE;
+ if(dhcpd->flag != DHCPD_TASK_NOT_CREATED){
+ return DHCPD_ERR_STATE;
+ }
+ dhcpd->flag = DHCPD_TASK_IS_CREATED;
if(0 == ip4_addr_get_u32(&(server_config->server)) || 0 == server_config->port || 0 == server_config->lease || 0 == server_config->renew) {
DHCPD_ERR("server_config parameter error!\r\n");
@@ -211,6 +219,7 @@ int dhcpd_start(void)
if (OS_OK != OS_ThreadCreate(&(dhcpd->dhcpd_thr), "dhcpd", dhcpd_task, (void *)dhcpd, OS_PRIORITY_BELOW_NORMAL, DHCPD_TASK_STACK_SIZE)) {
DHCPD_ERR("[%s, %d]OS_ThreadCreate dhcpd->dhcpd_thr fail.\r\n", __func__, __LINE__);
+ dhcpd->flag = DHCPD_TASK_NOT_CREATED;
return DHCPD_ERR_OS_SERVICE;
}
@@ -221,11 +230,15 @@ int dhcpd_stop(void)
{
dhcpd_ctrl_t *dhcpd = dhcpd_get_handle();
- if(dhcpd->flag == LN_TRUE)
+ if(dhcpd->flag == DHCPD_TASK_IS_RUNNING)
{
- dhcpd->flag = LN_FALSE;
+ /* notify dhcpd task exit */
+ dhcpd->flag = DHCPD_TASK_SIGNAL_EXIT;
+ do {
+ OS_MsDelay(10);
+ } while (dhcpd->flag != DHCPD_TASK_NOT_CREATED);
+
// DHCPD_ERR("------ DHCP STOP ------\r\n");
- OS_MsDelay(60);
}
return DHCPD_ERR_NONE;
}
@@ -233,7 +246,7 @@ int dhcpd_stop(void)
int dhcpd_is_running(void)
{
dhcpd_ctrl_t *dhcpd = dhcpd_get_handle();
- return dhcpd->flag;
+ return (dhcpd->flag == DHCPD_TASK_IS_RUNNING);
}
static void dhcpd_close_socket(int *dhcp_socket)
@@ -748,7 +761,7 @@ int do_decline(struct raw_msg *msg, uint16_t *send_pkt_len, uint16_t max_mtu) {
int dhcpd_curr_config_set(server_config_t *server_config)
{
dhcpd_ctrl_t *dhcpd = dhcpd_get_handle();
- if (dhcpd->flag == LN_TRUE) {
+ if (dhcpd->flag == DHCPD_TASK_IS_RUNNING) {
return DHCPD_ERR_STATE;
}
memcpy(&(dhcpd->server_config), server_config, sizeof(server_config_t));
diff --git a/components/net/lwip-2.1.3/src/port/ln_osal/arch/sys_arch.c b/components/net/lwip-2.1.3/src/port/ln_osal/arch/sys_arch.c
index 23fedcccc62be4586985fb6046e95864983141e6..75d60af206f7c2cfa85565f2422dc8f509082db8 100644
--- a/components/net/lwip-2.1.3/src/port/ln_osal/arch/sys_arch.c
+++ b/components/net/lwip-2.1.3/src/port/ln_osal/arch/sys_arch.c
@@ -427,10 +427,6 @@ void sys_mbox_free(sys_mbox_t *mbox)
}
#endif
-
-/* Support only one tcpip thread to save space */
-static OS_Thread_t g_lwip_tcpip_thread;
-
/** The only thread function:
* Creates a new thread
* @param name human-readable name for the thread (used for debugging purposes)
@@ -440,13 +436,16 @@ static OS_Thread_t g_lwip_tcpip_thread;
* @param prio priority of the new thread (may be ignored by ports) */
sys_thread_t sys_thread_new(const char *name, lwip_thread_fn thread, void *arg, int stacksize, int prio)
{
- if (OS_ThreadIsValid(&g_lwip_tcpip_thread))
- return NULL;
+ OS_Status status = OS_OK;
+ OS_Thread_t os_thr_hdlr = { 0 };
- if (OS_ThreadCreate(&g_lwip_tcpip_thread, name, (OS_ThreadEntry_t)thread, arg, (OS_Priority)prio, stacksize) != OS_OK) {
- return NULL;
- }
- return &g_lwip_tcpip_thread;
+ LWIP_ASSERT("In param eror", !(stacksize < 4 || prio <= 0));
+
+ status = OS_ThreadCreate(&os_thr_hdlr, name, (OS_ThreadEntry_t)thread,
+ arg, (OS_Priority)prio, stacksize);
+ LWIP_ASSERT("task creation failed", status == OS_OK);
+
+ return os_thr_hdlr.handle;
}
#endif /* (NO_SYS == 0) */
diff --git a/components/net/lwip-2.1.3/src/port/ln_osal/include/arch/sys_arch.h b/components/net/lwip-2.1.3/src/port/ln_osal/include/arch/sys_arch.h
index bb06caf6950431f89a9503eb4efa816928f9f8c8..bc24c72e63585c074e308cce64ee2b0bb3ee3aec 100644
--- a/components/net/lwip-2.1.3/src/port/ln_osal/include/arch/sys_arch.h
+++ b/components/net/lwip-2.1.3/src/port/ln_osal/include/arch/sys_arch.h
@@ -78,7 +78,7 @@ typedef OS_Queue_t sys_mbox_t;
#endif /* LWIP_MBOX_TRACE */
/* thread */
-typedef OS_Thread_t * sys_thread_t;
+typedef OS_ThreadHandle_t sys_thread_t;
/* sleep */
#define sys_msleep(msec) OS_MsDelay(msec)
diff --git a/components/net/lwip-2.1.3/src/port/ln_osal/include/lwipopts.h b/components/net/lwip-2.1.3/src/port/ln_osal/include/lwipopts.h
index 80658fbf882522e1b500820997a1fe1f4d9034ca..ad126c234789a6e4d469b78807002aee9dc14c6c 100644
--- a/components/net/lwip-2.1.3/src/port/ln_osal/include/lwipopts.h
+++ b/components/net/lwip-2.1.3/src/port/ln_osal/include/lwipopts.h
@@ -58,6 +58,8 @@ a lot of data that needs to be copied, this should be set high. */
/* MEMP_NUM_SYS_TIMEOUT: the number of simulateously active timeouts. */
#define MEMP_NUM_SYS_TIMEOUT (10)
+#define MEMP_NUM_TCPIP_MSG_INPKT (12)
+#define MEMP_NUM_TCPIP_MSG_API (8)
#define PBUF_LINK_HLEN (14 + ETH_PAD_SIZE)
@@ -66,14 +68,18 @@ a lot of data that needs to be copied, this should be set high. */
/* PBUF_POOL_SIZE: the number of buffers in the pbuf pool. */
#define PBUF_POOL_SIZE (2*IP_REASS_MAX_PBUFS) // 40
/* PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. */
-#define PBUF_POOL_BUFSIZE 512 //(NETIF_MTU + PBUF_LINK_HLEN)
+#define PBUF_POOL_BUFSIZE 772 //(NETIF_MTU + PBUF_LINK_HLEN)
+#if PBUF_POOL_BUFSIZE > (TCP_MSS+PBUF_IP_HLEN+PBUF_TRANSPORT_HLEN+PBUF_LINK_ENCAPSULATION_HLEN+PBUF_LINK_HLEN)
+#undef PBUF_POOL_BUFSIZE
+#define PBUF_POOL_BUFSIZE (TCP_MSS+PBUF_IP_HLEN+PBUF_TRANSPORT_HLEN+PBUF_LINK_ENCAPSULATION_HLEN+PBUF_LINK_HLEN)
+#endif
/* ---------- TCP options ---------- */
#define LWIP_TCP (1)
#define TCP_TTL (255)
/* Controls if TCP should queue segments that arrive out of order. Define to 0 if your device is low on memory. */
-#define TCP_QUEUE_OOSEQ (0)
+#define TCP_QUEUE_OOSEQ (1)
/* TCP Maximum segment size. */
#define TCP_MSS (NETIF_MTU - 40) //TCP_MSS = (Ethernet MTU - IP header size - TCP header size)
/* TCP sender buffer space (bytes). */
@@ -81,7 +87,7 @@ a lot of data that needs to be copied, this should be set high. */
/* TCP_SND_QUEUELEN: TCP sender buffer space (pbufs). This must be at least as much as (2 * TCP_SND_BUF/TCP_MSS) for things to work. */
#define TCP_SND_QUEUELEN (5 * TCP_SND_BUF/TCP_MSS)
/* TCP receive window. */
-#define TCP_WND (2 * TCP_MSS)
+#define TCP_WND (3 * TCP_MSS)
/* Maximum number of retransmissions of data segments. */
#define TCP_MAXRTX (12)
/* Maximum number of retransmissions of SYN segments. */
@@ -187,10 +193,10 @@ a lot of data that needs to be copied, this should be set high. */
#define TCPIP_THREAD_PRIO OS_PRIORITY_ABOVE_NORMAL
#define TCPIP_THREAD_STACKSIZE (3*1024)
-#define TCPIP_MBOX_SIZE 8
-#define DEFAULT_RAW_RECVMBOX_SIZE 6
-#define DEFAULT_UDP_RECVMBOX_SIZE 6
-#define DEFAULT_TCP_RECVMBOX_SIZE 6
+#define TCPIP_MBOX_SIZE (MEMP_NUM_TCPIP_MSG_INPKT + MEMP_NUM_TCPIP_MSG_API)
+#define DEFAULT_RAW_RECVMBOX_SIZE (MEMP_NUM_NETBUF)
+#define DEFAULT_UDP_RECVMBOX_SIZE (MEMP_NUM_NETBUF)
+#define DEFAULT_TCP_RECVMBOX_SIZE (MEMP_NUM_NETBUF)
#define DEFAULT_ACCEPTMBOX_SIZE 4
#define DEFAULT_THREAD_STACKSIZE 500
diff --git a/components/net/lwip-2.1.3/src/port/ln_osal/netif/ethernetif.c b/components/net/lwip-2.1.3/src/port/ln_osal/netif/ethernetif.c
index e23b959d86a667e4d860251cd7e025ff3595bb9d..26c714e4aa80c41f04f9b1daf0d08d9eeb873dac 100644
--- a/components/net/lwip-2.1.3/src/port/ln_osal/netif/ethernetif.c
+++ b/components/net/lwip-2.1.3/src/port/ln_osal/netif/ethernetif.c
@@ -278,6 +278,7 @@ int netdev_set_state(netif_idx_t nif_idx, netdev_state_t state)
netifapi_netif_set_link_up(nif);
dhcpd_stop();
dhcpd_start();
+ print_netdev_info(nif);
}
else
{
diff --git a/components/wifi/wifi_lib_export/wifi.h b/components/wifi/wifi_lib_export/wifi.h
index 3c6b5b4e585b1a7451e29f7b838f613773a7bc05..3ff9e95f5c5f0972ff63e19e91ea121b44622674 100644
--- a/components/wifi/wifi_lib_export/wifi.h
+++ b/components/wifi/wifi_lib_export/wifi.h
@@ -242,6 +242,16 @@ int wifi_recv_ethernet_pkt_callback_reg(wifi_recv_ethernet_pkt_cb_t recv_cb)
int wifi_send_ethernet_pkt(uint8_t *data, int len, uint16_t retry_max, uint8_t retry_timeout);
int wifi_private_command(char *pvtcmd);
+void wifi_disable_sw_duration_cfg(void);
+int wifi_rts_threshold_set(int val);
+
+/**
+ * @param type
+ * 0: G_SELF_CTS_PROT
+ * 1: G_RTS_CTS_PROT
+*/
+int wifi_erp_prot_set(uint8_t type);
+
/**
* wifi_rf_calibration
*
diff --git a/components/wifi/wifi_lib_import/wifi_port.c b/components/wifi/wifi_lib_import/wifi_port.c
index c1846542c8ecc9efd425a34af4f642b3b564f86a..6cc6f7bbd29f7c8d60ba45efa159107ac459e61e 100644
--- a/components/wifi/wifi_lib_import/wifi_port.c
+++ b/components/wifi/wifi_lib_import/wifi_port.c
@@ -295,9 +295,15 @@ void wlib_assert(int expr, const char *fun, int line)
#define SNIFFER_MEM_POOL_CHUNK_BUF_SIZE (30)
#define SNIFFER_MEM_POOL_CHUNK_SIZE (MEM_POOL_CHUNK_INFO_SIZE + SNIFFER_MEM_POOL_CHUNK_BUF_SIZE)
static ln_mem_pool_t sniffer_mem_pool = {0};
+static uint8_t s_wlib_snp_inited = 0;
int wlib_sniffer_mem_pool_init(void)
{
+ if (s_wlib_snp_inited != 0) {
+ return LN_TRUE;
+ }
+ s_wlib_snp_inited = 1;
+
#if (defined(SNIFFER_MEM_POOL_USE_DYNAMIC_MEM) && SNIFFER_MEM_POOL_USE_DYNAMIC_MEM)
sniffer_mem_pool.mem_base = (uint8_t *)OS_Malloc(SNIFFER_MEM_POOL_CHUNK_CNT * SNIFFER_MEM_POOL_CHUNK_SIZE);
sniffer_mem_pool.free_chunk_ptr = (uint8_t **)OS_Malloc(SNIFFER_MEM_POOL_CHUNK_CNT * sizeof(void *));
@@ -321,6 +327,11 @@ int wlib_sniffer_mem_pool_init(void)
void wlib_sniffer_mem_pool_deinit(void)
{
+ if (s_wlib_snp_inited == 0) {
+ return;
+ }
+ s_wlib_snp_inited = 0;
+
#if (defined(SNIFFER_MEM_POOL_USE_DYNAMIC_MEM) && SNIFFER_MEM_POOL_USE_DYNAMIC_MEM)
OS_Free(sniffer_mem_pool.mem_base);
OS_Free(sniffer_mem_pool.free_chunk_ptr);
@@ -594,5 +605,17 @@ void wlib_os_delay_ms(uint32_t ms)
OS_MsDelay(ms);
}
+static const wlib_wifi_data_rate_t g_wlib_wifi_dr = {
+ .dr_11b = USER_CFG_DR_11B,
+ .dr_11g = USER_CFG_DR_11G,
+ .dr_11n = {10, 11, 12, 13, 14, 15, 16, 17}, /* offset is 10, not currently in use */
+ .dr_11b_only_basic_rate = USER_CFG_DR_11B_ONLY_BR,
+ .dr_11g_only_basic_rate = USER_CFG_DR_11G_ONLY_BR,
+ .dr_11bg_mixed1_basic_rate = USER_CFG_DR_11BG_MIXED1_BR,
+ .dr_11bg_mixed2_basic_rate = USER_CFG_DR_11BG_MIXED2_BR,
+};
-
+const wlib_wifi_data_rate_t *wlib_data_rate_info_get(void)
+{
+ return (const wlib_wifi_data_rate_t *)(&g_wlib_wifi_dr);
+}
diff --git a/components/wifi/wifi_lib_import/wifi_port.h b/components/wifi/wifi_lib_import/wifi_port.h
index 18632f72f7427745182d92bd6567293843c3b9ad..da3c3b8f943d4a56b3a292c22faf1c5f3b274d3c 100644
--- a/components/wifi/wifi_lib_import/wifi_port.h
+++ b/components/wifi/wifi_lib_import/wifi_port.h
@@ -9,6 +9,38 @@
typedef size_t (*wlib_pvtcmd_output_pfn)(const char *format, va_list args);
+#define WLIB_DR_11B_MAX_NUM (4)
+#define WLIB_DR_11G_MAX_NUM (8)
+#define WLIB_DR_11N_MAX_NUM (8)
+#define WLIB_DR_BR_MAX_NUM (8)
+
+/**
+ * wlib_wifi_data_rate_t
+ * Configure the unused rate to 0
+*/
+typedef struct
+{
+ uint8_t dr_11b[WLIB_DR_11B_MAX_NUM]; /* 1, 2, 5, 11 */ /* Use 5 for 5.5 */
+ uint8_t dr_11g[WLIB_DR_11G_MAX_NUM]; /* 6, 9, 12, 18, 24, 36, 48, 54 */
+ uint8_t dr_11n[WLIB_DR_11N_MAX_NUM]; /* 0, 1, 2, 3, 4, 5, 6, 7 */ /* MCS0 - MCS7 */
+ /* 6, 13, 19, 26, 39, 52, 58, 65 */ /* GI = 800ns */
+ /* 7, 14, 21, 28, 43, 57, 65, 72 */ /* GI = 400ns */
+ uint8_t dr_11b_only_basic_rate[WLIB_DR_11B_MAX_NUM];
+ uint8_t dr_11g_only_basic_rate[WLIB_DR_11G_MAX_NUM];
+ uint8_t dr_11bg_mixed1_basic_rate[WLIB_DR_BR_MAX_NUM];
+ uint8_t dr_11bg_mixed2_basic_rate[WLIB_DR_BR_MAX_NUM];
+} wlib_wifi_data_rate_t; /* unit: Mbps */
+
+#define USER_CFG_DR_11B {1, 2, 5, 11}
+#define USER_CFG_DR_11G {6, 9, 12, 18, 24, 36, 48, 54}
+
+#define USER_CFG_DR_11B_ONLY_BR {1, 2, 0, 0}
+#define USER_CFG_DR_11G_ONLY_BR {6, 12, 24, 0, 0, 0, 0, 0}
+#define USER_CFG_DR_11BG_MIXED1_BR {1, 2, 5, 11, 0, 0, 0, 0}
+#define USER_CFG_DR_11BG_MIXED2_BR {1, 2, 5, 11, 6, 12, 24, 0}
+
+const wlib_wifi_data_rate_t *wlib_data_rate_info_get(void);
+
/* hardware for MAC Interrupt */
void wlib_mac_isr_enable(void);
void wlib_mac_isr_disable(void);
diff --git a/lib/armcclib/ln882h_wifi.lib b/lib/armcclib/ln882h_wifi.lib
index 9d5150fad8f6796c59a368bf1302d6b94b1747e3..7483e76e8b544a26ec143d085a39f3e75b60b4e5 100644
Binary files a/lib/armcclib/ln882h_wifi.lib and b/lib/armcclib/ln882h_wifi.lib differ
diff --git a/lib/gcclib/libln882h_wifi.a b/lib/gcclib/libln882h_wifi.a
index c08edfa9d7ef930d8809d39ee87987d98b6b7e62..78f239c64b7ed1001d5cc2a9cd6883e63aaeaf4e 100644
Binary files a/lib/gcclib/libln882h_wifi.a and b/lib/gcclib/libln882h_wifi.a differ
diff --git a/mcu/driver_ln882h/hal/hal_adc.c b/mcu/driver_ln882h/hal/hal_adc.c
index 6c98e3eb0990038ebcac10e490027bc7382aee63..917905dc0d2608310e311a579d4de61c63ba92c0 100644
--- a/mcu/driver_ln882h/hal/hal_adc.c
+++ b/mcu/driver_ln882h/hal/hal_adc.c
@@ -21,6 +21,8 @@ static int8_t adc_cal_param_3 = 0;
static int8_t adc_cal_param_4 = 0;
static float adc_cal_param_5 = 0;
//static float adc_cal_param_6 = 0;
+
+/* The ADC_CH0 will be used by WiFi CAL !!!*/
void hal_adc_init(uint32_t adc_base,adc_init_t_def* adc_init)
{
uint8_t reg_value = 0;
diff --git a/mcu/driver_ln882h/hal/hal_adc.h b/mcu/driver_ln882h/hal/hal_adc.h
index 78bf6d134b2468823df127b87201e42854e933dd..4281d703441d50e9ee68810308841fccca53442b 100644
--- a/mcu/driver_ln882h/hal/hal_adc.h
+++ b/mcu/driver_ln882h/hal/hal_adc.h
@@ -26,7 +26,9 @@
typedef enum
{
+ /* The ADC_CH0 will be used by WiFi CAL !!!*/
ADC_AWD_CH0 = 0,
+
ADC_AWD_CH1 = 1,
ADC_AWD_CH2 = 2,
ADC_AWD_CH3 = 3,
diff --git a/mcu/driver_ln882h/hal/hal_adv_timer.c b/mcu/driver_ln882h/hal/hal_adv_timer.c
index 78fe438a1e81e6687670f50c2715fea251cd4d51..89efab203343938d27a72eb8a3363ba38cdbbc8b 100644
--- a/mcu/driver_ln882h/hal/hal_adv_timer.c
+++ b/mcu/driver_ln882h/hal/hal_adv_timer.c
@@ -396,6 +396,14 @@ void hal_adv_tim_set_cap_edge(uint32_t adv_tim_x_base,adv_tim_cap_edg_t adv_tim_
}
}
+uint8_t hal_adv_tim_get_clock_div(uint32_t adv_tim_x_base)
+{
+ /* check the parameters */
+ hal_assert(IS_ADV_TIMER_ALL_PERIPH(adv_tim_x_base));
+ return pwm_div_getf(adv_tim_x_base);
+}
+
+
uint8_t hal_adv_tim_get_cap_dege(uint32_t adv_tim_x_base)
{
uint8_t reg_data = 0;
diff --git a/mcu/driver_ln882h/hal/hal_adv_timer.h b/mcu/driver_ln882h/hal/hal_adv_timer.h
index 06c2d145cf57311fd08230915bb97751f52b3061..f5ad1a765ba26c543c3c37bfea400d55dbfb7782 100644
--- a/mcu/driver_ln882h/hal/hal_adv_timer.h
+++ b/mcu/driver_ln882h/hal/hal_adv_timer.h
@@ -321,6 +321,7 @@ uint16_t hal_adv_tim_get_count(uint32_t adv_tim_x_base);
uint16_t hal_adv_tim_get_comp_b(uint32_t adv_tim_x_base);
uint16_t hal_adv_tim_get_comp_a(uint32_t adv_tim_x_base);
uint8_t hal_adv_tim_get_cap_dege(uint32_t adv_tim_x_base);
+uint8_t hal_adv_tim_get_clock_div(uint32_t adv_tim_x_base);
//interrupt
void hal_adv_tim_it_cfg(uint32_t adv_tim_x_base,adv_tim_it_flag_t adv_tim_it_flag,hal_en_t en);
diff --git a/mcu/driver_ln882h/hal/hal_flash.c b/mcu/driver_ln882h/hal/hal_flash.c
index 33485aa2d174ac50a390962c77ff03b0857fa7e4..1cd6344258a2c08e8846ab2a3f6cfebf3d5ab670 100644
--- a/mcu/driver_ln882h/hal/hal_flash.c
+++ b/mcu/driver_ln882h/hal/hal_flash.c
@@ -471,9 +471,39 @@ uint16_t hal_flash_read_status(void)
return value;
}
+/**
+ * @brief Read FLASH Unique ID 128bits.
+ */
+void hal_flash_read_unique_id(uint8_t *unique_id)
+{
+ uint8_t cmd_buf[5];
+ uint8_t read_back[16];
+ uint16_t value = 0;
+
+ cmd_buf[0] = FLASH_READ_UNIQUE_ID;
+ cmd_buf[1] = 0;//dumy data
+ cmd_buf[2] = 0;//dumy data
+ cmd_buf[3] = 0;//dumy data
+ cmd_buf[4] = 0;//dumy data
+
+#if (FLASH_XIP == 1)
+ GLOBAL_INT_DISABLE();
+ flash_cache_disable();
+#endif
+
+ hal_qspi_standard_read_byte(read_back, sizeof(read_back), cmd_buf, sizeof(cmd_buf));
+
+#if (FLASH_XIP == 1)
+ flash_cache_init(0);
+ GLOBAL_INT_RESTORE();
+#endif
+
+ memcpy(unique_id,read_back,sizeof(read_back));
+}
+
+
/**
* @brief Send command Program/Erase Suspend
- * @return uint16_t
*/
void hal_flash_program_erase_suspend(void)
{
@@ -493,7 +523,6 @@ void hal_flash_program_erase_suspend(void)
/**
* @brief Send command Program/Erase Resume
- * @return uint16_t
*/
void hal_flash_program_erase_resume(void)
{
diff --git a/mcu/driver_ln882h/hal/hal_flash.h b/mcu/driver_ln882h/hal/hal_flash.h
index 1e8cbda0c275872b7a1a5e32c5e8874fb770042f..668e2a7db3e149bf5e063dde9299f008cca11efa 100644
--- a/mcu/driver_ln882h/hal/hal_flash.h
+++ b/mcu/driver_ln882h/hal/hal_flash.h
@@ -49,6 +49,7 @@ typedef enum
FLASH_RESUME = 0x7A,//Program/Erase Resume
FLASH_READ_ID = 0x9F,//Read Identification
FLASH_READ_DEVICE_ID = 0x90,//Read Manufacture ID/Device ID
+ FLASH_READ_UNIQUE_ID = 0x4B,//Read Unique ID
FLASH_SECURITY_ERASE = 0x44,
FLASH_SECURITY_PROGRAM = 0x42,
diff --git a/mcu/driver_ln882h/hal/hal_rtc.c b/mcu/driver_ln882h/hal/hal_rtc.c
index 6723dca6a59ea58d933a317986103e3997a09ba4..9a6fa44f02b3c3baa35f89c24dc0d76fd66adf47 100644
--- a/mcu/driver_ln882h/hal/hal_rtc.c
+++ b/mcu/driver_ln882h/hal/hal_rtc.c
@@ -70,7 +70,7 @@ uint32_t hal_rtc_get_cnt(uint32_t rtc_base)
{
/* check the parameters */
hal_assert(IS_RTC_ALL_PERIPH(rtc_base));
- return rtc_rtc_ccvr_get(rtc_base);
+ return rtc_currentcountervalue_getf(rtc_base);
}
diff --git a/mcu/driver_ln882h/hal/hal_timer.c b/mcu/driver_ln882h/hal/hal_timer.c
index 92cd4a012facc044fc2efe2f0858c8b573fde66c..49c02d82d0a5095a22e9b5d7bec325f4bb6fc172 100644
--- a/mcu/driver_ln882h/hal/hal_timer.c
+++ b/mcu/driver_ln882h/hal/hal_timer.c
@@ -12,7 +12,7 @@
/* Includes ------------------------------------------------------------------*/
#include "hal/hal_timer.h"
-
+/* The TIMER3 will be used by WiFi Lib !!!*/
void hal_tim_init(uint32_t tim_x_base,tim_init_t_def *tim_init)
{
/* check the parameters */
@@ -80,6 +80,33 @@ void hal_tim_deinit(void)
sysc_cmp_timer4_gate_en_setf(0);
}
+uint8_t hal_tim_get_div(uint32_t tim_x_base)
+{
+ /* check the parameters */
+ hal_assert(IS_TIMER_ALL_PERIPH(tim_x_base));
+
+ uint8_t div_val = 0;
+
+ switch (tim_x_base)
+ {
+ case TIMER0_BASE:
+ div_val = sysc_cmp_timer1_div_para_m1_getf();
+ break;
+ case TIMER1_BASE:
+ div_val = sysc_cmp_timer2_div_para_m1_getf();
+ break;
+ case TIMER2_BASE:
+ div_val = sysc_cmp_timer3_div_para_m1_getf();
+ break;
+ case TIMER3_BASE:
+ div_val = sysc_cmp_timer4_div_para_m1_getf();
+ break;
+ default:
+ break;
+ }
+ return div_val;
+}
+
void hal_tim_en(uint32_t tim_x_base,hal_en_t en)
{
/* check the parameters */
@@ -115,6 +142,13 @@ void hal_tim_set_load_value(uint32_t tim_x_base,uint32_t value)
timer_timerloadcountregister_setf(tim_x_base,value);
}
+uint32_t hal_tim_get_load_value(uint32_t tim_x_base)
+{
+ /* check the parameters */
+ hal_assert(IS_TIMER_ALL_PERIPH(tim_x_base));
+ return timer_timerloadcountregister_getf(tim_x_base);
+}
+
void hal_tim_set_load2_value(uint32_t tim_x_base,uint32_t value)
{
/* check the parameters */
@@ -124,6 +158,13 @@ void hal_tim_set_load2_value(uint32_t tim_x_base,uint32_t value)
timer_timerloadcount2register_setf(tim_x_base,value);
}
+uint32_t hal_tim_get_load2_value(uint32_t tim_x_base)
+{
+ /* check the parameters */
+ hal_assert(IS_TIMER_ALL_PERIPH(tim_x_base));
+ return timer_timerloadcount2register_getf(tim_x_base);
+}
+
uint32_t hal_tim_get_current_cnt_value(uint32_t tim_x_base)
{
/* check the parameters */
diff --git a/mcu/driver_ln882h/hal/hal_timer.h b/mcu/driver_ln882h/hal/hal_timer.h
index 08150ce97407e6ece3b2d110ceaaf51e91271580..c0a994c9902342343d41056b63596be7b1712d01 100644
--- a/mcu/driver_ln882h/hal/hal_timer.h
+++ b/mcu/driver_ln882h/hal/hal_timer.h
@@ -26,6 +26,8 @@
#define TIMER0_BASE (TIMER_BASE + 0x00000000U)
#define TIMER1_BASE (TIMER_BASE + 0x00000018U)
#define TIMER2_BASE (TIMER_BASE + 0x00000030U)
+
+/* The TIMER3 will be used by WiFi Lib !!!*/
#define TIMER3_BASE (TIMER_BASE + 0x00000048U)
@@ -90,7 +92,9 @@ void hal_tim_set_load_value(uint32_t tim_x_base,uint32_t value);
void hal_tim_set_load2_value(uint32_t tim_x_base,uint32_t value);
uint32_t hal_tim_get_current_cnt_value(uint32_t tim_x_base);
void hal_tim_pwm_en(uint32_t tim_x_base,hal_en_t en);
-
+uint8_t hal_tim_get_div(uint32_t tim_x_base);
+uint32_t hal_tim_get_load_value(uint32_t tim_x_base);
+uint32_t hal_tim_get_load2_value(uint32_t tim_x_base);
//timer interrupt init
void hal_tim_it_cfg(uint32_t tim_x_base,tim_it_flag_t tim_it_flag,hal_en_t en);
diff --git a/mcu/ln882h/ln882h.h b/mcu/ln882h/ln882h.h
index 29fe16816b5d694d4bdaaec2369b1d5c491e326f..292e2d4fb675ce1aa4ef73622663e8f80bc67a6a 100644
--- a/mcu/ln882h/ln882h.h
+++ b/mcu/ln882h/ln882h.h
@@ -165,7 +165,7 @@ typedef enum IRQn
* LN882H_SDK_MINOR_V: 0-255
*/
#define LN882H_SDK_MAJOR_V 1
-#define LN882H_SDK_MINOR_V 4
+#define LN882H_SDK_MINOR_V 5
#define LN882H_SDK_RC_V 255/* 0: development, 255: release, 1-254: release candidates */
diff --git a/project/bootcode/ramcode_dl/main/ramcode_port.c b/project/bootcode/ramcode_dl/main/ramcode_port.c
index 3bd7857a25d1709dcdecacac80893601ac2df2ba..c5b77234cc1a57a16fb7490a97f1fc9853520bb6 100644
--- a/project/bootcode/ramcode_dl/main/ramcode_port.c
+++ b/project/bootcode/ramcode_dl/main/ramcode_port.c
@@ -14,7 +14,7 @@
#include "ramcode_port.h"
#include "serial/serial.h"
#include "hal/hal_flash.h"
-
+#include "hal/hal_misc.h"
/***************************************** variables *********************************************/
static Serial_t bootram_fd;
@@ -75,7 +75,7 @@ int bootram_flash_chiperase(void)
void bootram_user_reboot(void)
{
- NVIC_SystemReset();
+ hal_misc_reset_all();
}
void bootram_serial_init(void)
diff --git a/project/mcu_peripheral_driver_demo/GPIO/CMakeLists.txt b/project/mcu_peripheral_driver_demo/GPIO/CMakeLists.txt
new file mode 100644
index 0000000000000000000000000000000000000000..d5cd734a2a7bbf1e6b70da576b192d54a1a634b1
--- /dev/null
+++ b/project/mcu_peripheral_driver_demo/GPIO/CMakeLists.txt
@@ -0,0 +1,65 @@
+include(ProjModuleCollect.cmake)
+
+set(PROJ_ALL_SRC
+ app/main.c
+
+ bsp/serial_hw.c
+
+ bsp/ln_show_reg.c
+ bsp/ln_test_common.c
+ bsp/ln_uart_test.c
+ bsp/ln_spi_master_test.c
+ bsp/ln_spi_slave_test.c
+ bsp/ln_i2c_test.c
+ bsp/ln_mpu9250_test.c
+ bsp/ln_oled_test.c
+ bsp/ln_timer_test.c
+ bsp/ln_rtc_test.c
+ bsp/ln_adv_timer_test.c
+ bsp/ln_wdt_test.c
+ bsp/ln_i2s_test.c
+ bsp/ln_ws2811_test.c
+ bsp/ln_dma_test.c
+ bsp/ln_gpio_test.c
+ bsp/ln_ext_test.c
+ bsp/ln_flash_test.c
+ bsp/ln_sdio_test.c
+ bsp/ln_aes_test.c
+ bsp/ln_ds18b20_test.c
+ bsp/ln_clk_test.c
+ bsp/ln_trng_test.c
+ bsp/ln_adc_test.c
+ bsp/ln_spi_lcd_test.c
+
+ startup/startup_${CHIP_SERIAL}_gcc.c
+ ${MODULE_SRC}
+)
+
+
+#---------------------------- project output elf ---------------------------
+set(TARGET_ELF_NAME ${USER_PROJECT})
+set(pro_executable_target ${TARGET_ELF_NAME}.elf)
+add_executable(${pro_executable_target} ${PROJ_ALL_SRC})
+
+target_link_libraries(${pro_executable_target}
+ PUBLIC
+ -lc -lm -lnosys
+
+ PRIVATE
+ -T${LINKER_SCRIPT}
+ ${EXTRA_LINK_FLAGS}
+)
+
+target_link_directories(${pro_executable_target}
+ PRIVATE
+ ${LN_SDK_ROOT}/lib/gcclib
+)
+
+target_include_directories(${pro_executable_target}
+ PRIVATE
+ app
+ bsp
+ cfg
+)
+
+include(gcc/gcc-custom-build-stage.cmake)
diff --git a/project/mcu_peripheral_driver_demo/GPIO/ProjModuleCollect.cmake b/project/mcu_peripheral_driver_demo/GPIO/ProjModuleCollect.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..5ae408e77cf966c6c857749279e311b824ce151b
--- /dev/null
+++ b/project/mcu_peripheral_driver_demo/GPIO/ProjModuleCollect.cmake
@@ -0,0 +1,60 @@
+################################### utils ####################################
+set(UTILS_SRC
+ ${COMP_UTILS_DIR}/debug/ln_assert.c
+ ${COMP_UTILS_DIR}/debug/log.c
+ ${COMP_UTILS_DIR}/wrap_stdio.c
+ ${COMP_UTILS_DIR}/fifo/fifobuf.c
+)
+
+include_directories(${COMP_UTILS_DIR})
+include_directories(${COMP_UTILS_DIR}/fifo)
+list(APPEND MODULE_SRC ${UTILS_SRC})
+
+################################### serial ###################################
+file(GLOB_RECURSE SERIAL_SRC ${COMP_SERIAL_DIR}/*.c)
+include_directories(${COMP_SERIAL_DIR})
+list(APPEND MODULE_SRC ${SERIAL_SRC})
+
+################################### MCU ####################################
+set(MCU_SRC
+ ${MCU_LN882X_DIR}/driver_${CHIP_SERIAL}/hal/hal_adc.c
+ ${MCU_LN882X_DIR}/driver_${CHIP_SERIAL}/hal/hal_aes.c
+ ${MCU_LN882X_DIR}/driver_${CHIP_SERIAL}/hal/hal_cache.c
+ ${MCU_LN882X_DIR}/driver_${CHIP_SERIAL}/hal/hal_common.c
+ ${MCU_LN882X_DIR}/driver_${CHIP_SERIAL}/hal/hal_dma.c
+ ${MCU_LN882X_DIR}/driver_${CHIP_SERIAL}/hal/hal_ext.c
+ ${MCU_LN882X_DIR}/driver_${CHIP_SERIAL}/hal/hal_flash.c
+ ${MCU_LN882X_DIR}/driver_${CHIP_SERIAL}/hal/hal_gpio.c
+ ${MCU_LN882X_DIR}/driver_${CHIP_SERIAL}/hal/hal_i2s.c
+ ${MCU_LN882X_DIR}/driver_${CHIP_SERIAL}/hal/hal_it.c
+ ${MCU_LN882X_DIR}/driver_${CHIP_SERIAL}/hal/hal_i2c.c
+ ${MCU_LN882X_DIR}/driver_${CHIP_SERIAL}/hal/hal_qspi.c
+ ${MCU_LN882X_DIR}/driver_${CHIP_SERIAL}/hal/hal_rtc.c
+ ${MCU_LN882X_DIR}/driver_${CHIP_SERIAL}/hal/hal_spi.c
+ ${MCU_LN882X_DIR}/driver_${CHIP_SERIAL}/hal/hal_timer.c
+ ${MCU_LN882X_DIR}/driver_${CHIP_SERIAL}/hal/hal_trng.c
+ ${MCU_LN882X_DIR}/driver_${CHIP_SERIAL}/hal/hal_uart.c
+ ${MCU_LN882X_DIR}/driver_${CHIP_SERIAL}/hal/hal_wdt.c
+ ${MCU_LN882X_DIR}/driver_${CHIP_SERIAL}/hal/hal_ws2811.c
+ ${MCU_LN882X_DIR}/driver_${CHIP_SERIAL}/hal/hal_misc.c
+ ${MCU_LN882X_DIR}/driver_${CHIP_SERIAL}/hal/hal_clock.c
+ ${MCU_LN882X_DIR}/driver_${CHIP_SERIAL}/hal/hal_adv_timer.c
+ ${MCU_LN882X_DIR}/driver_${CHIP_SERIAL}/hal/hal_sdio_device.c
+
+ ${MCU_LN882X_DIR}/${CHIP_SERIAL}/system_${CHIP_SERIAL}.c
+)
+
+include_directories(${MCU_LN882X_DIR}/${CHIP_SERIAL})
+include_directories(${MCU_LN882X_DIR}/CMSIS_5.3.0)
+include_directories(${MCU_LN882X_DIR}/driver_${CHIP_SERIAL})
+include_directories(${MCU_LN882X_DIR}/driver_${CHIP_SERIAL}/hal)
+include_directories(${MCU_LN882X_DIR}/driver_${CHIP_SERIAL}/reg)
+list(APPEND MODULE_SRC ${MCU_SRC})
+
+################################### MISC ####################################
+set(MISC_SRC
+ ${COMP_LIBC_STUB_DIR}/newlib_noos.c
+ ${COMP_LIBC_STUB_DIR}/stub_malloc.c
+)
+include_directories(${LN_SDK_ROOT}/components)
+list(APPEND MODULE_SRC ${MISC_SRC})
diff --git a/project/mcu_peripheral_driver_demo/GPIO/app/main.c b/project/mcu_peripheral_driver_demo/GPIO/app/main.c
new file mode 100644
index 0000000000000000000000000000000000000000..3e21d45706725fa7b42026f368e7085a62ff9c7a
--- /dev/null
+++ b/project/mcu_peripheral_driver_demo/GPIO/app/main.c
@@ -0,0 +1,74 @@
+/**
+ * @file main.c
+ * @author BSP Team
+ * @brief
+ * @version 0.0.0.1
+ * @date 2021-08-05
+ *
+ * @copyright Copyright (c) 2021 Shanghai Lightning Semiconductor Technology Co. Ltd
+ *
+ */
+#include "hal/hal_common.h"
+#include "hal/hal_gpio.h"
+#include "ln_show_reg.h"
+#include "utils/debug/log.h"
+#include "ln_test_common.h"
+
+uint32_t data_buf[100];
+uint8_t pin_sta = 0;
+int main (int argc, char* argv[])
+{
+ /****************** 1. 系统初始化 ***********************/
+ SetSysClock();
+ log_init();
+ LOG(LOG_LVL_INFO,"ln882H init! \n");
+ ln_show_reg_init();
+
+ /****************** 2. 初始化GPIO结构体 ***********************/
+ gpio_init_t_def gpio_init;
+ memset(&gpio_init,0,sizeof(gpio_init)); //清零结构体
+
+ /****************** 3. GPIO 输出测试***********************/
+ gpio_init.dir = GPIO_OUTPUT; //配置GPIO方向为输出
+ gpio_init.pin = GPIO_PIN_5; //配置GPIO引脚号
+ gpio_init.speed = GPIO_HIGH_SPEED; //设置GPIO速度
+ hal_gpio_init(GPIOB_BASE,&gpio_init); //初始化GPIO
+
+ //将引脚输出高电平
+ hal_gpio_pin_set(GPIOB_BASE,GPIO_PIN_5);
+
+ //将引脚输出低电平
+ hal_gpio_pin_reset(GPIOB_BASE,GPIO_PIN_5);
+
+ //翻转引脚
+ hal_gpio_pin_toggle(GPIOB_BASE,GPIO_PIN_5);
+
+
+ /****************** 4. GPIO 输入测试***********************/
+ memset(&gpio_init,0,sizeof(gpio_init)); //清零结构体
+ gpio_init.dir = GPIO_INPUT; //配置GPIO方向为输入
+ gpio_init.pin = GPIO_PIN_5; //配置GPIO引脚号
+ gpio_init.speed = GPIO_HIGH_SPEED; //设置GPIO速度
+ hal_gpio_init(GPIOB_BASE,&gpio_init); //初始化GPIO
+
+ //读取引脚电平
+ pin_sta = hal_gpio_pin_read(GPIOB_BASE,GPIO_PIN_5);
+
+ //配置内部上拉
+ hal_gpio_pin_pull_set(GPIOB_BASE,GPIO_PIN_5,GPIO_PULL_UP);
+
+ //配置内部下拉
+ hal_gpio_pin_pull_set(GPIOB_BASE,GPIO_PIN_5,GPIO_PULL_DOWN);
+
+ //配置引脚为输出
+ hal_gpio_pin_direction_set(GPIOB_BASE,GPIO_PIN_5,GPIO_OUTPUT);
+
+ //配置引脚为输入
+ hal_gpio_pin_direction_set(GPIOB_BASE,GPIO_PIN_5,GPIO_INPUT);
+
+ while(1)
+ {
+ LOG(LOG_LVL_INFO,"LN882H is running! \n");
+ ln_delay_ms(1000);
+ }
+}
diff --git a/project/mcu_peripheral_driver_demo/GPIO/bsp/ln_drv_trng.c b/project/mcu_peripheral_driver_demo/GPIO/bsp/ln_drv_trng.c
new file mode 100644
index 0000000000000000000000000000000000000000..05df387826cb224706b3e5b7c6b2aea27ce7ac1d
--- /dev/null
+++ b/project/mcu_peripheral_driver_demo/GPIO/bsp/ln_drv_trng.c
@@ -0,0 +1,81 @@
+/**
+ * @file ln_drv_trng.c
+ * @author BSP Team
+ * @brief
+ * @version 0.0.0.1
+ * @date 2021-11-05
+ *
+ * @copyright Copyright (c) 2021 Shanghai Lightning Semiconductor Technology Co. Ltd
+ *
+ */
+
+#include "ln_drv_trng.h"
+
+/**
+ * @brief 随机数初始化
+ *
+ * @param range 设置随机数的范围
+ * @param data 设置存储随机数的指针
+ * @param count 设置要想生成随机数的数量
+ */
+void trng_init(uint32_t range,uint32_t *data,uint32_t count)
+{
+ uint32_t data_pos = 0;
+
+ trng_init_t_def trng_init;
+ memset(&trng_init,0,sizeof(trng_init));
+
+ trng_init.trng_fast_mode_en_status = TRNG_FAST_MODE_DIS;
+ trng_init.trng_gap = 10;
+
+ hal_trng_init(TRNG_BASE,&trng_init);
+
+ while(count > 4)
+ {
+ hal_trng_en(TRNG_BASE,HAL_ENABLE);
+ while(hal_trng_get_it_flag(TRNG_BASE,TRNG_IT_FLAG_TRNG_DONE) == 0);
+ data[data_pos++] = hal_trng_get_data_0_31(TRNG_BASE) % range;
+ data[data_pos++] = hal_trng_get_data_32_63(TRNG_BASE) % range;
+ data[data_pos++] = hal_trng_get_data_64_95(TRNG_BASE) % range;
+ data[data_pos++] = hal_trng_get_data_96_127(TRNG_BASE) % range;
+
+ count -= 4;
+ }
+
+ if(count > 0)
+ {
+ hal_trng_en(TRNG_BASE,HAL_ENABLE);
+ while(hal_trng_get_it_flag(TRNG_BASE,TRNG_IT_FLAG_TRNG_DONE) == 0);
+ switch(count)
+ {
+ case 1:
+ {
+ data[data_pos++] = hal_trng_get_data_0_31(TRNG_BASE) % range;
+ break;
+ }
+ case 2:
+ {
+ data[data_pos++] = hal_trng_get_data_0_31(TRNG_BASE) % range;
+ data[data_pos++] = hal_trng_get_data_32_63(TRNG_BASE) % range;
+ break;
+ }
+ case 3:
+ {
+ data[data_pos++] = hal_trng_get_data_0_31(TRNG_BASE) % range;
+ data[data_pos++] = hal_trng_get_data_32_63(TRNG_BASE) % range;
+ data[data_pos++] = hal_trng_get_data_64_95(TRNG_BASE) % range;
+ break;
+ }
+ case 4:
+ {
+ data[data_pos++] = hal_trng_get_data_0_31(TRNG_BASE) % range;
+ data[data_pos++] = hal_trng_get_data_32_63(TRNG_BASE) % range;
+ data[data_pos++] = hal_trng_get_data_64_95(TRNG_BASE) % range;
+ data[data_pos++] = hal_trng_get_data_96_127(TRNG_BASE) % range;
+ break;
+ }
+
+ }
+ }
+}
+
diff --git a/project/mcu_peripheral_driver_demo/GPIO/bsp/ln_drv_trng.h b/project/mcu_peripheral_driver_demo/GPIO/bsp/ln_drv_trng.h
new file mode 100644
index 0000000000000000000000000000000000000000..5c305d5cab43e80889234330046230fb9b99318d
--- /dev/null
+++ b/project/mcu_peripheral_driver_demo/GPIO/bsp/ln_drv_trng.h
@@ -0,0 +1,31 @@
+/**
+ * @file ln_drv_rtc.h
+ * @author BSP Team
+ * @brief
+ * @version 0.0.0.1
+ * @date 2021-11-05
+ *
+ * @copyright Copyright (c) 2021 Shanghai Lightning Semiconductor Technology Co. Ltd
+ *
+ */
+#ifndef __LN_DRV_RTC_H
+#define __LN_DRV_RTC_H
+
+
+#ifdef __cplusplus
+ extern "C" {
+#endif /* __cplusplus */
+
+#include "hal/hal_common.h"
+#include "hal_trng.h"
+
+
+void trng_init(uint32_t range,uint32_t *data,uint32_t count);
+
+#ifdef __cplusplus
+}
+#endif // __cplusplus
+
+#endif //__LN_DRV_RTC_H
+
+
diff --git a/project/mcu_peripheral_driver_demo/GPIO/bsp/ln_show_reg.c b/project/mcu_peripheral_driver_demo/GPIO/bsp/ln_show_reg.c
new file mode 100644
index 0000000000000000000000000000000000000000..743dffd9d79e057a6aa5aa7d93ff4559d3d99dfc
--- /dev/null
+++ b/project/mcu_peripheral_driver_demo/GPIO/bsp/ln_show_reg.c
@@ -0,0 +1,121 @@
+/**
+ * @file ln_show_reg.c
+ * @author BSP Team
+ * @brief This file provides show the reg in the watch window function.
+ * @version 0.0.0.1
+ * @date 2021-03-17
+ *
+ * @copyright Copyright (c) 2021 Shanghai Lightning Semiconductor Technology Co. Ltd
+ *
+ */
+#include "ln_show_reg.h"
+#include "ln882h.h"
+#include "hal/hal_adv_timer.h"
+#include "hal/hal_timer.h"
+
+#include "reg_dma.h"
+#include "reg_cache.h"
+#include "reg_sysc_awo.h"
+#include "reg_sysc_cmp.h"
+#include "reg_cache.h"
+#include "reg_ln_uart.h"
+#include "reg_i2c.h"
+#include "reg_i2s.h"
+#include "reg_spi.h"
+#include "reg_qspi.h"
+#include "reg_timer.h"
+#include "reg_efuse.h"
+#include "reg_adc.h"
+#include "reg_wdt.h"
+#include "reg_adv_timer.h"
+#include "reg_rtc.h"
+#include "reg_trng.h"
+#include "reg_gpio.h"
+#include "reg_ws2811.h"
+#include "reg_sdio.h"
+#include "reg_aes.h"
+
+volatile t_hwp_dma_t *DMA = (t_hwp_dma_t *) DMA_BASE;
+volatile T_HWP_CACHE_T *CACHE = (T_HWP_CACHE_T *) CACHE_FLASH_BASE;
+volatile T_HWP_QSPI_T *QSPI = (T_HWP_QSPI_T *) QSPI_BASE;
+volatile t_hwp_sysc_cmp_t *CMP = (t_hwp_sysc_cmp_t *) SYSC_CMP_BASE;
+volatile t_hwp_ln_uart_t *UART0 = (t_hwp_ln_uart_t *) UART0_BASE;
+volatile t_hwp_ln_uart_t *UART1 = (t_hwp_ln_uart_t *) UART1_BASE;
+volatile t_hwp_ln_uart_t *UART2 = (t_hwp_ln_uart_t *) UART2_BASE;
+
+volatile t_hwp_i2c_t *I2C = (t_hwp_i2c_t *) I2C_BASE;
+volatile T_HWP_I2S_T *I2S = (T_HWP_I2S_T *) I2S_BASE;
+volatile t_hwp_spi_t *SPI0 = (t_hwp_spi_t *) SPI0_BASE;
+volatile t_hwp_spi_t *SPI1 = (t_hwp_spi_t *) SPI1_BASE;
+volatile t_hwp_efuse_t *EFUSE = (t_hwp_efuse_t *) EFUSE_BASE;
+
+volatile t_hwp_timer_tmp_t *TIMER0 = (t_hwp_timer_tmp_t *) TIMER0_BASE;
+volatile t_hwp_timer_tmp_t *TIMER1 = (t_hwp_timer_tmp_t *) TIMER1_BASE;
+volatile t_hwp_timer_tmp_t *TIMER2 = (t_hwp_timer_tmp_t *) TIMER2_BASE;
+volatile t_hwp_timer_tmp_t *TIMER3 = (t_hwp_timer_tmp_t *) TIMER3_BASE;
+
+volatile t_hwp_adc_t *ADC = (t_hwp_adc_t *) ADC_BASE;
+
+
+
+volatile T_HWP_WDT_T *WDT = (T_HWP_WDT_T *) WDT_BASE;
+
+volatile t_hwp_pwm_t0 *ADV_TIMER_ISR = (t_hwp_pwm_t0 *) ADV_TIMER_IT_BASE;
+volatile t_hwp_pwm_t *ADV_TIMER_0 = (t_hwp_pwm_t *) ADV_TIMER_0_BASE;
+volatile t_hwp_pwm_t *ADV_TIMER_1 = (t_hwp_pwm_t *) ADV_TIMER_1_BASE;
+volatile t_hwp_pwm_t *ADV_TIMER_2 = (t_hwp_pwm_t *) ADV_TIMER_2_BASE;
+volatile t_hwp_pwm_t *ADV_TIMER_3 = (t_hwp_pwm_t *) ADV_TIMER_3_BASE;
+volatile t_hwp_pwm_t *ADV_TIMER_4 = (t_hwp_pwm_t *) ADV_TIMER_4_BASE;
+volatile t_hwp_pwm_t *ADV_TIMER_5 = (t_hwp_pwm_t *) ADV_TIMER_5_BASE;
+
+volatile t_hwp_sysc_awo_t *AWO = (t_hwp_sysc_awo_t *) SYSC_AWO_BASE;
+volatile t_hwp_rtc_t *RTC = (t_hwp_rtc_t *) RTC_BASE;
+volatile t_hwp_trng_t *TRNG = (t_hwp_trng_t *) TRNG_BASE;
+volatile t_hwp_ws2811_t *WS2811 = (t_hwp_ws2811_t*) WS2811_BASE;
+
+volatile t_hwp_gpio_t *GPIOA = (t_hwp_gpio_t *) GPIOA_BASE;
+volatile t_hwp_gpio_t *GPIOB = (t_hwp_gpio_t *) GPIOB_BASE;
+
+volatile T_HWP_SDIO_T *SDIO = (T_HWP_SDIO_T*) SDIO_BASE;
+
+volatile t_hwp_aes_t *AES = (t_hwp_aes_t*) AES_BASE;
+
+
+
+void ln_show_reg_init()
+{
+ //dummy read register
+ DMA->dma_ccr1.val;
+ CACHE->reg_cache_en.val;
+ QSPI->baudr;
+ CMP->clk_test;
+ UART0->uart_cr1;
+ UART1->uart_cr1;
+ UART2->uart_cr1;
+ I2C->i2c_ccr.val;
+ I2S->ch0_imr;
+ SPI0->cr1.val;
+ SPI1->cr1.val;
+ EFUSE->efuse_key1;
+ TIMER0->timercontrolreg.val;
+ TIMER1->timercontrolreg.val;
+ TIMER2->timercontrolreg.val;
+ TIMER3->timercontrolreg.val;
+ ADC->adc_ccr;
+ WDT->wdt_ccvr.val;
+ ADV_TIMER_ISR->ise.val;
+ ADV_TIMER_0->cr;
+ ADV_TIMER_1->cr;
+ ADV_TIMER_2->cr;
+ ADV_TIMER_3->cr;
+ ADV_TIMER_4->cr;
+ ADV_TIMER_5->cr;
+ AWO->clk_sel;
+ RTC->rtc_ccr.val;
+ TRNG->trng_cr.val;
+ GPIOA->gpio_bsrr.val;
+ GPIOB->gpio_ddr.val;
+ SDIO->sdio_cis_fn0;
+ AES->ctr0;
+}
+
diff --git a/project/mcu_peripheral_driver_demo/GPIO/bsp/ln_show_reg.h b/project/mcu_peripheral_driver_demo/GPIO/bsp/ln_show_reg.h
new file mode 100644
index 0000000000000000000000000000000000000000..522de1c469b8a114913a752c94e3aba3f204dd2a
--- /dev/null
+++ b/project/mcu_peripheral_driver_demo/GPIO/bsp/ln_show_reg.h
@@ -0,0 +1,17 @@
+/**
+ * @file ln_show_reg.h
+ * @author BSP Team
+ * @brief
+ * @version 0.0.0.1
+ * @date 2021-03-17
+ *
+ * @copyright Copyright (c) 2021 Shanghai Lightning Semiconductor Technology Co. Ltd
+ *
+ */
+
+#ifndef LN_SHOW_REG_INIT_H
+#define LN_SHOW_REG_INIT_H
+
+void ln_show_reg_init(void);
+
+#endif //LN_SHOW_REG_INIT_H
diff --git a/project/mcu_peripheral_driver_demo/GPIO/bsp/ln_test_common.c b/project/mcu_peripheral_driver_demo/GPIO/bsp/ln_test_common.c
new file mode 100644
index 0000000000000000000000000000000000000000..882ebfd024caacf64f3a48b02842b32def8d0dc7
--- /dev/null
+++ b/project/mcu_peripheral_driver_demo/GPIO/bsp/ln_test_common.c
@@ -0,0 +1,38 @@
+/**
+ * @file ln_test_common.c
+ * @author BSP Team
+ * @brief This file provides peripheral test common functions.
+ * @version 0.0.0.1
+ * @date 2021-08-06
+ *
+ * @copyright Copyright (c) 2021 Shanghai Lightning Semiconductor Technology Co. Ltd
+ *
+ */
+
+#include "ln_test_common.h"
+#include "hal_clock.h"
+
+
+/*This delay is the delay of the blocking method. When there is an interruption, the delay will be inaccurate!*/
+void ln_delay_ms(unsigned int time)
+{
+ //Only supports 40M and 160M
+ unsigned int timetout = 0;
+ unsigned int time_1ms = 0;
+ //40M
+ if(hal_clock_get_core_clk() == 40000000)
+ {
+ time_1ms = 490;
+ }
+ else
+ //160M
+ {
+ time_1ms = 19995*2;
+ }
+ while(time--)
+ {
+ timetout = time_1ms;
+ while(timetout--);
+ }
+}
+
diff --git a/project/mcu_peripheral_driver_demo/GPIO/bsp/ln_test_common.h b/project/mcu_peripheral_driver_demo/GPIO/bsp/ln_test_common.h
new file mode 100644
index 0000000000000000000000000000000000000000..732d21f10240ae657f895a37196e3cbd35787104
--- /dev/null
+++ b/project/mcu_peripheral_driver_demo/GPIO/bsp/ln_test_common.h
@@ -0,0 +1,17 @@
+/**
+ * @file ln_test_common.h
+ * @author BSP Team
+ * @brief This file provides peripheral test common functions.
+ * @version 0.0.0.1
+ * @date 2021-08-06
+ *
+ * @copyright Copyright (c) 2021 Shanghai Lightning Semiconductor Technology Co. Ltd
+ *
+ */
+#ifndef LN_TEST_COMMON_H
+#define LN_TEST_COMMON_H
+
+void ln_delay_us(volatile unsigned int time);
+void ln_delay_ms(unsigned int time);
+
+#endif
diff --git a/project/mcu_peripheral_driver_demo/GPIO/bsp/serial_hw.c b/project/mcu_peripheral_driver_demo/GPIO/bsp/serial_hw.c
new file mode 100644
index 0000000000000000000000000000000000000000..c78a2b0d5b8f962872fcfc1c54985582187bcc95
--- /dev/null
+++ b/project/mcu_peripheral_driver_demo/GPIO/bsp/serial_hw.c
@@ -0,0 +1,263 @@
+#include "proj_config.h"
+#include "hal/hal_uart.h"
+#include "serial.h"
+#include "serial_hw.h"
+#include "utils/debug/ln_assert.h"
+#include "hal/hal_gpio.h"
+
+
+#define UART0_TX_BUF_SIZE CFG_UART0_TX_BUF_SIZE
+#define UART0_RX_BUF_SIZE CFG_UART0_RX_BUF_SIZE
+
+/* TX and RX fifo buffer */
+uint8_t uart0_txbuf[UART0_TX_BUF_SIZE];
+uint8_t uart0_rxbuf[UART0_RX_BUF_SIZE];
+
+/* From the high-level serial driver */
+extern Serial_t serial_handles[1];
+
+/* UART device*/
+typedef struct
+{
+ uint32_t uart_base;
+ uart_init_t_def init_cfg;
+} uart_dev_t;
+static uart_dev_t g_uart0;
+
+/* serial */
+typedef struct
+{
+ struct SerialHardware Hardware;
+ struct Serial *serial;
+} ln_serial_t;
+ln_serial_t uart_serial[1];
+
+
+static void uart_io_pin_request(struct Serial *serial)
+{
+ if (serial->port_id == SER_PORT_UART0)
+ {
+ hal_gpio_pin_afio_select(GPIOB_BASE,GPIO_PIN_8,UART0_RX);
+ hal_gpio_pin_afio_select(GPIOB_BASE,GPIO_PIN_9,UART0_TX);
+ hal_gpio_pin_afio_en(GPIOB_BASE,GPIO_PIN_8,HAL_ENABLE);
+ hal_gpio_pin_afio_en(GPIOB_BASE,GPIO_PIN_9,HAL_ENABLE);
+ }
+ else if (serial->port_id == SER_PORT_UART1)
+ {
+ hal_gpio_pin_afio_select(GPIOA_BASE,GPIO_PIN_2,UART1_TX);
+ hal_gpio_pin_afio_select(GPIOA_BASE,GPIO_PIN_3,UART1_RX);
+ hal_gpio_pin_afio_en(GPIOA_BASE,GPIO_PIN_2,HAL_ENABLE);
+ hal_gpio_pin_afio_en(GPIOA_BASE,GPIO_PIN_3,HAL_ENABLE);
+ }
+ else if (serial->port_id == SER_PORT_UART2)
+ {
+ }
+}
+
+static void uart_io_pin_release(struct Serial *serial)
+{
+ if (serial == NULL)
+ {
+ return;
+ }
+
+ if (serial->port_id == SER_PORT_UART0)
+ {
+ hal_gpio_pin_afio_en(GPIOB_BASE,GPIO_PIN_8,HAL_DISABLE);
+ hal_gpio_pin_afio_en(GPIOB_BASE,GPIO_PIN_9,HAL_DISABLE);
+ }
+ else if (serial->port_id == SER_PORT_UART1)
+ {
+ hal_gpio_pin_afio_en(GPIOA_BASE,GPIO_PIN_2,HAL_DISABLE);
+ hal_gpio_pin_afio_en(GPIOA_BASE,GPIO_PIN_3,HAL_DISABLE);
+ }
+ else if (serial->port_id == SER_PORT_UART2)
+ {
+ }
+}
+
+static void hw_uart0_init(struct SerialHardware *_hw, struct Serial *serial, uint32_t baudrate)
+{
+ ln_serial_t *hw = NULL;
+
+ LN_ASSERT(_hw && serial);
+ hw = (ln_serial_t *)_hw;
+ hw->serial = serial;
+
+ g_uart0.uart_base = UART0_BASE;
+ g_uart0.init_cfg.baudrate = baudrate;//115200 921600 2000000
+ g_uart0.init_cfg.word_len = UART_WORD_LEN_8;
+ g_uart0.init_cfg.parity = UART_PARITY_NONE;
+ g_uart0.init_cfg.stop_bits = UART_STOP_BITS_1;
+
+ hal_uart_init(g_uart0.uart_base, &g_uart0.init_cfg);
+
+ hal_uart_rx_mode_en(UART0_BASE, HAL_ENABLE);
+ hal_uart_tx_mode_en(UART0_BASE, HAL_ENABLE);
+ hal_uart_en(UART0_BASE, HAL_ENABLE);
+
+ hal_uart_it_en(UART0_BASE, USART_IT_RXNE);
+ //uart_it_enable(UART0_BASE, USART_IT_TXE);//uart_it_enable(UART0_BASE, USART_IT_TXE);
+ NVIC_EnableIRQ(UART0_IRQn);
+
+ //request pin for uart
+ uart_io_pin_request(hw->serial);
+}
+
+static void hw_uart_cleanup(struct SerialHardware *_hw)
+{
+ ln_serial_t *hw = NULL;
+
+ LN_ASSERT(_hw);
+ hw = (ln_serial_t *)_hw;
+ uart_io_pin_release(hw->serial);
+ hw->serial = NULL;
+}
+#if 1
+static void hw_uart_tx_start_polling(struct SerialHardware * _hw)
+{
+ uint8_t ch;
+ ln_serial_t *hw = NULL;
+ uart_dev_t * pdev;
+
+ LN_ASSERT(_hw);
+ hw = (ln_serial_t *)_hw;
+ while(!fifo_isempty(&hw->serial->txfifo))
+ {
+ ch = fifo_pop(&hw->serial->txfifo);
+ pdev = (uart_dev_t *)hw->Hardware.hw_device;
+ while (hal_uart_flag_get(pdev->uart_base, USART_FLAG_TX_FIFO_FULL) == HAL_SET) {};
+ hal_uart_send_data(pdev->uart_base, ch);
+ }
+}
+#else
+
+static void hw_uart_tx_start_isr(struct SerialHardware * _hw)
+{
+ ln_serial_t *hw = NULL;
+ LN_ASSERT(_hw);
+ hw = (ln_serial_t *)_hw;
+
+ if (hw->Hardware.isSending){
+ return;
+ }
+
+ if(!fifo_isempty(&hw->serial->txfifo))
+ {
+ hw->Hardware.isSending = LN_TRUE;
+ /* Enable TX empty interrupts. */
+ uart_it_enable(UART0_BASE, USART_IT_TXE);
+ }
+}
+#endif
+
+static uint8_t hw_uart_tx_is_sending(struct SerialHardware * _hw)
+{
+ ln_serial_t *hw = NULL;
+
+ LN_ASSERT(_hw);
+ hw = (ln_serial_t *)_hw;
+ return hw->Hardware.isSending;
+}
+
+static uint8_t hw_uart_setBaudrate(struct SerialHardware * _hw, uint32_t baudrate)
+{
+ ln_serial_t *hw = NULL;
+ uart_dev_t * pdev;
+
+ LN_ASSERT(_hw);
+ hw = (ln_serial_t *)_hw;
+
+ pdev = (uart_dev_t *)hw->Hardware.hw_device;
+
+ hal_uart_baudrate_set(pdev->uart_base, baudrate);
+ return LN_TRUE;
+}
+
+/*
+ * High-level interface data structures.
+ */
+static const struct SerialHardwareVT uart0_vtable =
+{
+ .init = hw_uart0_init,
+ .cleanup = hw_uart_cleanup,
+ .txStart = hw_uart_tx_start_polling,//hw_uart_tx_start_polling,//hw_uart_tx_start_isr
+ .txSending = hw_uart_tx_is_sending,
+ .setBaudrate = hw_uart_setBaudrate,
+};
+
+ln_serial_t uart_serial[1] =
+{
+ {
+ .Hardware =
+ {
+ .table = &uart0_vtable,
+ .txbuffer = uart0_txbuf,
+ .rxbuffer = uart0_rxbuf,
+ .txbuffer_size = sizeof(uart0_txbuf),
+ .rxbuffer_size = sizeof(uart0_rxbuf),
+ .hw_device = (void *)&g_uart0,
+ .isSending = LN_FALSE,
+ },
+ .serial = NULL,
+ },
+};
+
+struct SerialHardware *serial_hw_getdesc(serial_port_id_t port_id)
+{
+ LN_ASSERT(port_id < SER_PORT_NUM);
+ return (struct SerialHardware *)&uart_serial[port_id].Hardware;
+}
+
+
+static inline void uart0_send_data_isr(void)
+{
+ ln_serial_t *hw = (ln_serial_t *)&uart_serial[SER_PORT_UART0];
+ uint8_t tx_char = 0;
+
+ if (fifo_isempty(&hw->serial->txfifo))
+ {
+ hal_uart_it_disable(UART0_BASE, USART_IT_TXE);
+ hw->Hardware.isSending = LN_FALSE;
+ }
+ else
+ {
+ tx_char = fifo_pop(&hw->serial->txfifo);
+ hal_uart_send_data(UART0_BASE, tx_char);
+ while (hal_uart_flag_get(UART0_BASE, USART_FLAG_TX_FIFO_FULL) == HAL_SET) {};
+ }
+}
+
+static inline void uart0_recv_data_isr(void)
+{
+ uint8_t ch = 0;
+
+ ln_serial_t *hw = (ln_serial_t *)&uart_serial[SER_PORT_UART0];
+
+ while (fifo_isfull(&hw->serial->rxfifo)){
+ serial_purge_rx(hw->serial);
+ }
+
+ ch = hal_uart_recv_data(UART0_BASE);
+
+ fifo_push(&hw->serial->rxfifo, ch);
+ hw->serial->rx_callback();
+}
+
+static inline void serial_uart0_isr_callback(void)
+{
+ if (hal_uart_flag_get(UART0_BASE, USART_FLAG_RXNE) && hal_uart_it_en_status_get(UART0_BASE,USART_IT_RXNE)) {
+ uart0_recv_data_isr();
+ }
+
+ if (hal_uart_flag_get(UART0_BASE, USART_FLAG_TXE) && hal_uart_it_en_status_get(UART0_BASE,USART_IT_TXE)) {
+ uart0_send_data_isr();
+ }
+}
+
+///=====================UART0 IQR Handle===============================///
+void UART0_IRQHandler(void)
+{
+ serial_uart0_isr_callback();
+}
+
diff --git a/project/mcu_peripheral_driver_demo/GPIO/bsp/serial_hw.h b/project/mcu_peripheral_driver_demo/GPIO/bsp/serial_hw.h
new file mode 100644
index 0000000000000000000000000000000000000000..edea58ce923185f85318e928f68c4d8ea9045695
--- /dev/null
+++ b/project/mcu_peripheral_driver_demo/GPIO/bsp/serial_hw.h
@@ -0,0 +1,42 @@
+#ifndef __SERIAL_HW_H__
+#define __SERIAL_HW_H__
+
+#include "hal/hal_uart.h"
+#include "ln_types.h"
+
+struct SerialHardware;
+struct Serial;
+
+typedef enum {
+ SER_PORT_UART0 = 0,
+ SER_PORT_UART1 = 1,
+ SER_PORT_UART2 = 2,
+ SER_PORT_NUM = 3, /**< Number of serial ports */
+ SER_PORT_ID_INVALID = SER_PORT_NUM
+}serial_port_id_t;
+
+struct SerialHardwareVT
+{
+ void (*init )(struct SerialHardware *ctx, struct Serial *ser, uint32_t baudrate);
+ void (*cleanup )(struct SerialHardware *ctx);
+ void (*txStart )(struct SerialHardware *ctx);
+ uint8_t (*txSending )(struct SerialHardware *ctx);
+ uint8_t (*setBaudrate)(struct SerialHardware *ctx, uint32_t baudrate);
+};
+
+struct SerialHardware
+{
+ const struct SerialHardwareVT *table;
+ unsigned char *txbuffer;
+ unsigned char *rxbuffer;
+ size_t txbuffer_size;
+ size_t rxbuffer_size;
+ void *hw_device;
+ volatile uint8_t isSending;
+};
+
+struct SerialHardware *serial_hw_getdesc(serial_port_id_t port_id);
+
+
+
+#endif /* __SERIAL_HW_H__ */
diff --git a/project/mcu_peripheral_driver_demo/GPIO/cfg/.gitignore b/project/mcu_peripheral_driver_demo/GPIO/cfg/.gitignore
new file mode 100644
index 0000000000000000000000000000000000000000..ee4b8b0c7e32368908d292be8f4cc5bc053f0994
--- /dev/null
+++ b/project/mcu_peripheral_driver_demo/GPIO/cfg/.gitignore
@@ -0,0 +1 @@
+flash_partition_table.h
\ No newline at end of file
diff --git a/project/mcu_peripheral_driver_demo/GPIO/cfg/flash_partition_cfg.json b/project/mcu_peripheral_driver_demo/GPIO/cfg/flash_partition_cfg.json
new file mode 100644
index 0000000000000000000000000000000000000000..f18c3e65d86b011383aaff7cfc066f1637c18821
--- /dev/null
+++ b/project/mcu_peripheral_driver_demo/GPIO/cfg/flash_partition_cfg.json
@@ -0,0 +1,21 @@
+{
+ "Warning1":"警告，系统定义用户不可修改!!!",
+ "vendor_define":
+ [
+ {"partition_type": "BOOT", "start_addr": "0x00000000", "size_KB": 24 },
+ {"partition_type": "PART_TAB", "start_addr": "0x00006000", "size_KB": 4 }
+ ],
+
+
+ "Warning2":"以下数据,用户根据SOC flash容量以及具体需求修改，仅可以修改start_addr值和size值，且必须4KB对齐!!!",
+ "user_define":
+ [
+ {"partition_type": "APP", "start_addr": "0x00007000", "size_KB": 1200 },
+ {"partition_type": "OTA", "start_addr": "0x00133000", "size_KB": 680 },
+ {"partition_type": "NVDS", "start_addr": "0x001DD000", "size_KB": 12 },
+ {"partition_type": "KV", "start_addr": "0x001E0000", "size_KB": 16 },
+ {"partition_type": "USER", "start_addr": "0x001E4000", "size_KB": 112 }
+ ]
+}
+
+
diff --git a/project/mcu_peripheral_driver_demo/GPIO/cfg/peripheral_test.sct b/project/mcu_peripheral_driver_demo/GPIO/cfg/peripheral_test.sct
new file mode 100644
index 0000000000000000000000000000000000000000..9559ca8c45839c43c99fd09ee252462cc2257ef4
--- /dev/null
+++ b/project/mcu_peripheral_driver_demo/GPIO/cfg/peripheral_test.sct
@@ -0,0 +1,36 @@
+#! armcc -E
+
+#include "../cfg/flash_partition_table.h"
+#include "../../../../mcu/ln882h/mem_map_ln882h.h"
+
+
+LR_FLASH CACHE_FLASH_BASE+APP_SPACE_OFFSET+IMAGE_HEADER_SIZE APP_SPACE_SIZE
+{
+ ISR_VECTOR RAM_BASE ALIGN 0x100
+ {
+ startup_*.o (RESET, +First)
+ }
+
+
+ ER_FLASH CACHE_FLASH_BASE+APP_SPACE_OFFSET+IMAGE_HEADER_SIZE+ImageLength(ISR_VECTOR) APP_SPACE_SIZE
+ {
+ *(InRoot$$Sections)
+ .ANY (+RO)
+ }
+
+ ER_CODE ImageLimit(ISR_VECTOR)
+ {
+ hal_flash.o(+RO)
+ hal_cache.o(+RO)
+ hal_qspi.o(+RO)
+ }
+ ER_STACK +0
+ {
+ startup_ln*(+RW +ZI)
+ }
+
+ ER_DATA +0
+ {
+ .ANY (+RW +ZI)
+ }
+}
diff --git a/project/mcu_peripheral_driver_demo/GPIO/cfg/peripheral_test_ram_run.sct b/project/mcu_peripheral_driver_demo/GPIO/cfg/peripheral_test_ram_run.sct
new file mode 100644
index 0000000000000000000000000000000000000000..4666ddd5ca28a8abed9c8d837ba556700a041f32
--- /dev/null
+++ b/project/mcu_peripheral_driver_demo/GPIO/cfg/peripheral_test_ram_run.sct
@@ -0,0 +1,12 @@
+#! armcc -E
+
+#include "..\..\..\mcu\ln882h\mem_map_ln882h.h"
+
+LOAD_RAM RAM_BASE (RAM_BLOCK0_SIZE + RAM_BLOCK1_SIZE + RETENTION_MEM_SIZE + CACHE_MEM_SIZE) {
+
+ BOOTRAM_EXEC_DECTION +0 ALIGN 0x100{
+ startup_*.o(RESET,+First);
+ *.o(InRoot$$Sections);
+ *.o(+RO,+RW,+ZI);
+ }
+}
diff --git a/project/mcu_peripheral_driver_demo/GPIO/cfg/proj_config.h b/project/mcu_peripheral_driver_demo/GPIO/cfg/proj_config.h
new file mode 100644
index 0000000000000000000000000000000000000000..94b8fd1edb8f04a867d37c1d8085546161bc63d2
--- /dev/null
+++ b/project/mcu_peripheral_driver_demo/GPIO/cfg/proj_config.h
@@ -0,0 +1,47 @@
+#ifndef _PROJ_CONFIG_H_
+#define _PROJ_CONFIG_H_
+
+#define DISABLE (0)
+#define ENABLE (1)
+
+/*
+ * Clock settings section
+ * Note:
+ *
+ */
+#define XTAL_CLOCK (40000000)
+#define RCO_CLOCK (32000)
+#define PLL_CLOCK (160000000)
+
+
+/*
+ * Module enable/disable control
+ */
+#define FULL_ASSERT DISABLE
+#define PRINTF_OMIT DISABLE // when release software, set 1 to omit all printf logs
+#define PRINT_TO_RTT DISABLE // 1: print to segger rtt 0: print to uart1
+
+#define FLASH_XIP ENABLE
+
+/*
+ * flash image settings
+ */
+#define FLASH_IMAGE_VER_MAJOR 0
+#define FLASH_IMAGE_VER_MINOR 1
+#define SOC_CRP_FLAG 0
+
+
+
+/*
+ * Hardware config
+ */
+#define CFG_UART0_TX_BUF_SIZE 256
+#define CFG_UART0_RX_BUF_SIZE 512
+
+#define CFG_UART_BAUDRATE_LOG 115200
+
+
+
+#endif /* _PROJ_CONFIG_H_ */
+
+
diff --git a/project/mcu_peripheral_driver_demo/GPIO/cfg/ram_run_ln882h.ini b/project/mcu_peripheral_driver_demo/GPIO/cfg/ram_run_ln882h.ini
new file mode 100644
index 0000000000000000000000000000000000000000..1af55ce14e22889a2227112694c85a2db83ff9f0
--- /dev/null
+++ b/project/mcu_peripheral_driver_demo/GPIO/cfg/ram_run_ln882h.ini
@@ -0,0 +1,10 @@
+FUNC void Setup (void) {
+ SP = _RDWORD(0x20000000); // Setup Stack Pointer
+ PC = _RDWORD(0x20000004); // Setup Program Counter
+ _WDWORD(0xE000ED08, 0x20000100); // Setup Vector Table Offset Register
+}
+
+
+load %L incremental
+
+Setup(); // Setup for Running
diff --git a/project/mcu_peripheral_driver_demo/GPIO/gcc/gcc-compiler-flags.cmake b/project/mcu_peripheral_driver_demo/GPIO/gcc/gcc-compiler-flags.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..5488ec4d031ea251824e63ba96a05fdc45888c93
--- /dev/null
+++ b/project/mcu_peripheral_driver_demo/GPIO/gcc/gcc-compiler-flags.cmake
@@ -0,0 +1,74 @@
+string(TOUPPER ${CHIP_SERIAL} DEF_CHIP_SERIAL)
+add_compile_definitions(${DEF_CHIP_SERIAL})
+add_compile_definitions(ARM_MATH_CM4)
+
+set(CPU "-mcpu=cortex-m4")
+set(FPU "-mfpu=fpv4-sp-d16")
+set(FLOAT_ABI "-mfloat-abi=hard")
+set(MCU "-mthumb -mabi=aapcs ${CPU} ${FPU} ${FLOAT_ABI}")
+
+set(C_WARNFLAGS "-Wall -Wextra -Wundef -Wshadow -Wredundant-decls \
+ -Wstrict-prototypes -Wimplicit-function-declaration -Wmissing-prototypes \
+ -Wdouble-promotion -Wfloat-conversion -pedantic"
+)
+
+set(CXX_WARNFLAGS "-Wall -Wextra -Wundef -Wshadow -Wredundant-decls \
+ -Wdouble-promotion -Wfloat-conversion -pedantic"
+)
+
+set(PREPFLAGS "-MD -MP")
+set(SPECSFLAGS "")
+set(ASFLAGS ${MCU})
+set(ARCHFLAGS ${MCU})
+set(OPTFLAGS ${OPTFLAGS})
+set(LINK_FLAGS "${ARCHFLAGS} -Wl,--gc-sections -u _printf_float -u _scanf_float")
+
+
+################################## C Flags ###################################
+set(CMAKE_C_STANDARD 99)
+set(CMAKE_C_FLAGS "${ARCHFLAGS} ${OPTFLAGS} ${C_WARNFLAGS} ${PREPFLAGS} \
+ -ffunction-sections -fdata-sections -fno-strict-aliasing ${SPECSFLAGS}"
+ CACHE INTERNAL "C compiler flags"
+)
+
+set(CMAKE_C_FLAGS_DEBUG "-ggdb"
+ CACHE INTERNAL "Flags used by the C compiler during DEBUG builds."
+)
+
+set(CMAKE_C_FLAGS_RELEASE "-O1 -DNDEBUG"
+ CACHE INTERNAL "Flags used by the C compiler during RELEASE builds."
+)
+
+
+################################# CXX Flags ##################################
+set(CMAKE_CXX_STANDARD 11)
+set(CMAKE_CXX_FLAGS "${ARCHFLAGS} ${OPTFLAGS} ${CXX_WARNFLAGS} ${PREPFLAGS} \
+ -ffunction-sections -fdata-sections -fno-strict-aliasing -fno-rtti -fno-exceptions ${SPECSFLAGS}"
+ CACHE INTERNAL "Cxx compiler flags"
+)
+
+set(CMAKE_CXX_FLAGS_DEBUG "-ggdb"
+ CACHE INTERNAL "Flags used by the CXX compiler during DEBUG builds."
+)
+
+set(CMAKE_CXX_FLAGS_RELEASE "-O1 -DNDEBUG"
+ CACHE INTERNAL "Flags used by the CXX compiler during RELEASE builds."
+)
+
+
+################################# ASM Flags ##################################
+set(CMAKE_ASM_FLAGS "${ASFLAGS} -x assembler-with-cpp"
+ CACHE INTERNAL "ASM compiler flags"
+)
+
+set(LINKER_SCRIPT "${LN_SDK_ROOT}/project/${USER_PROJECT}/gcc/${CHIP_SERIAL}.ld")
+
+set(EXTRA_LINK_FLAGS "-Wl,-Map=${USER_PROJECT}.map,--cref,--no-warn-mismatch \
+ -Wl,--print-memory-usage --specs=nano.specs --specs=nosys.specs"
+)
+
+set(CMAKE_EXE_LINKER_FLAGS "${LINK_FLAGS}"
+ CACHE INTERNAL "Exe linker flags"
+)
+
+set(CMAKE_C_OUTPUT_EXTENSION_REPLACE 1)
diff --git a/project/mcu_peripheral_driver_demo/GPIO/gcc/gcc-custom-build-stage.cmake b/project/mcu_peripheral_driver_demo/GPIO/gcc/gcc-custom-build-stage.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..2ff83f29ecf463eeed21e86cca24a563e440c770
--- /dev/null
+++ b/project/mcu_peripheral_driver_demo/GPIO/gcc/gcc-custom-build-stage.cmake
@@ -0,0 +1,29 @@
+################################################################################
+##################### update flash partition table first ####################
+################################################################################
+set(FLASH_PYTHON_SCRIPT ${LN_SDK_ROOT}/tools/python_scripts/before_build_gcc.py)
+set(FLASH_PART_CFG_JSON ${LN_SDK_ROOT}/project/${USER_PROJECT}/cfg/flash_partition_cfg.json)
+set(FLASH_PART_TABLE_FILE ${LN_SDK_ROOT}/project/${USER_PROJECT}/cfg/flash_partition_table.h)
+
+execute_process(COMMAND python3 ${FLASH_PYTHON_SCRIPT} -p ${FLASH_PART_CFG_JSON} -o ${FLASH_PART_TABLE_FILE}
+ WORKING_DIRECTORY ${LN_SDK_ROOT}/project/${USER_PROJECT}/cfg
+)
+
+################################################################################
+########################### update linker script ############################
+################################################################################
+set(REWRITE_LINKERSCRIPT ${LN_SDK_ROOT}/tools/python_scripts/rewrite_ln882x_linker_script.py)
+set(LINKER_PATH ${LN_SDK_ROOT}/project/${USER_PROJECT}/gcc/${CHIP_SERIAL}.ld)
+
+execute_process(COMMAND python3 ${REWRITE_LINKERSCRIPT} ${FLASH_PART_CFG_JSON} ${LINKER_PATH}
+ WORKING_DIRECTORY ${LN_SDK_ROOT}/project/${USER_PROJECT}/gcc
+)
+
+################################################################################
+################################ make image #################################
+################################################################################
+add_custom_target(MakeImage ALL
+ COMMAND python3 ${LN_MKIMAGE} --sdkroot_dir ${LN_SDK_ROOT} --userproj_dir ${CMAKE_CURRENT_LIST_DIR}/../ --buildout_dir ${EXECUTABLE_OUTPUT_PATH} --buildout_name ${TARGET_ELF_NAME} --output flashimage.bin
+ DEPENDS ${pro_executable_target}
+ WORKING_DIRECTORY ${EXECUTABLE_OUTPUT_PATH}
+)
diff --git a/project/mcu_peripheral_driver_demo/GPIO/gcc/gcc-toolchain-setup.cmake b/project/mcu_peripheral_driver_demo/GPIO/gcc/gcc-toolchain-setup.cmake
new file mode 100644
index 0000000000000000000000000000000000000000..d0243c13496c034230eb84c7d781caf72993ce4f
--- /dev/null
+++ b/project/mcu_peripheral_driver_demo/GPIO/gcc/gcc-toolchain-setup.cmake
@@ -0,0 +1,41 @@
+# the name of the target operating system (cross-compling)
+set(CMAKE_SYSTEM_NAME Generic)
+set(CMAKE_SYSTEM_VERSION 1)
+set(CMAKE_SYSTEM_PROCESSOR Arm)
+
+set(TOOL_SUFFIX "")
+if (WIN32)
+ if($ENV{CROSS_TOOLCHAIN_ROOT} STREQUAL "")
+ message(FATAL_ERROR "CROSS_TOOLCHAIN_ROOT must be set!!!")
+ endif($ENV{CROSS_TOOLCHAIN_ROOT} STREQUAL "")
+
+ set(COMPILER_HOME $ENV{CROSS_TOOLCHAIN_ROOT} CACHE PATH "cross-compiler home" FORCE)
+ set(TOOL_SUFFIX ".exe")
+elseif (APPLE)
+ MESSAGE(FATAL_ERROR "NOT SUPPORT")
+elseif (UNIX)
+ if($ENV{CROSS_TOOLCHAIN_ROOT} STREQUAL "")
+ message(FATAL_ERROR "CROSS_TOOLCHAIN_ROOT must be set!!!")
+ endif($ENV{CROSS_TOOLCHAIN_ROOT} STREQUAL "")
+
+ set(COMPILER_HOME $ENV{CROSS_TOOLCHAIN_ROOT} CACHE PATH "cross-compiler home" FORCE)
+ set(TOOL_SUFFIX "")
+endif ()
+
+# set compiler prefix.
+set(CROSS_COMPILE_PREFIX ${COMPILER_HOME}/bin/arm-none-eabi-)
+
+# set compiler tool path.
+set(CMAKE_C_COMPILER ${CROSS_COMPILE_PREFIX}gcc${TOOL_SUFFIX} CACHE FILEPATH "C compiler" FORCE)
+set(CMAKE_CXX_COMPILER ${CROSS_COMPILE_PREFIX}g++${TOOL_SUFFIX} CACHE FILEPATH "CXX compiler" FORCE)
+set(CMAKE_ASM_COMPILER ${CROSS_COMPILE_PREFIX}gcc${TOOL_SUFFIX} CACHE FILEPATH "ASM compiler" FORCE)
+set(CMAKE_OBJCOPY ${CROSS_COMPILE_PREFIX}objcopy${TOOL_SUFFIX} CACHE FILEPATH "objcopy tool" FORCE)
+set(CMAKE_OBJDUMP ${CROSS_COMPILE_PREFIX}objdump${TOOL_SUFFIX} CACHE FILEPATH "objdump tool" FORCE)
+set(CMAKE_SIZE ${CROSS_COMPILE_PREFIX}size${TOOL_SUFFIX} CACHE FILEPATH "size tool" FORCE)
+set(LN_MKIMAGE ${LN_SDK_ROOT}/tools/python_scripts/after_build_gcc.py CACHE FILEPATH "mkimage tool" FORCE)
+
+set(CMAKE_TRY_COMPILE_TARGET_TYPE STATIC_LIBRARY)
+set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER)
+set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY)
+set(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY)
+set(CMAKE_FIND_ROOT_PATH_MODE_PACKAGE ONLY)
diff --git a/project/mcu_peripheral_driver_demo/GPIO/gcc/ln882h.ld b/project/mcu_peripheral_driver_demo/GPIO/gcc/ln882h.ld
new file mode 100644
index 0000000000000000000000000000000000000000..65e8d79f7ee092bb1d5deb13878fa2b391478b9a
--- /dev/null
+++ b/project/mcu_peripheral_driver_demo/GPIO/gcc/ln882h.ld
@@ -0,0 +1,170 @@
+OUTPUT_FORMAT("elf32-littlearm", "elf32-gigarm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(Reset_Handler)
+
+/* Linker script to configure memory regions. */
+MEMORY
+{
+ FLASH (rx) : ORIGIN = 0x1000A100, LENGTH = 400K
+ RAM0 (rwx) : ORIGIN = 0x20000000, LENGTH = 288K
+ RETENTION (rwx) : ORIGIN = 0x20048000, LENGTH = 8K
+ CACHE_MEM (rwx) : ORIGIN = 0x2004A000, LENGTH = 32K
+}
+
+
+SECTIONS
+{
+ .flash_copysection :
+ {
+ __copysection_ram0_load = LOADADDR(.flash_copysection);
+ __copysection_ram0_start = .;
+ KEEP(*(.vectors)) /* startup code: ARM vectors */
+
+ *hal_qspi.o*(.text*)
+ *hal_cache.o*(.text*)
+ *hal_dma.o*(.text*)
+ *hal_rtc.o*(.text*)
+ *qspi.o*(.text*)
+ *flash.o*(.text*)
+ *port.o*(.text*)
+
+ /* Optional .text part*/
+ /*
+ *hal_uart.o*(.text)
+ *log.o*(.text)
+ *serial.o*(.text)
+ *serial_hw.o*(.text)
+ *fifobuf.o*(.text)
+ */
+
+ . = ALIGN(4);
+ /* all RW data in ram0 of wlan shared memory and lwip pubf pool are not in this section, they are in .bss section */
+ *(.data*)
+ . = ALIGN(4);
+ /* preinit data */
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP(*(.preinit_array))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+
+ . = ALIGN(4);
+ /* init data */
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP(*(SORT(.init_array.*)))
+ KEEP(*(.init_array))
+ PROVIDE_HIDDEN (__init_array_end = .);
+
+ . = ALIGN(4);
+ /* finit data */
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP(*(SORT(.fini_array.*)))
+ KEEP(*(.fini_array))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+
+ KEEP(*(.jcr*))
+ . = ALIGN(4);
+ /* All data end */
+ __copysection_ram0_end = .;
+
+ } >RAM0 AT>FLASH
+
+ .flash_text :
+ {
+ PROVIDE(_stext = .);
+ *(.text*)
+ PROVIDE(_etext = .);
+
+ KEEP(*(.init))
+ KEEP(*(.fini))
+
+ /* .ctors */
+ *crtbegin.o(.ctors)
+ *crtbegin?.o(.ctors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+ *(SORT(.ctors.*))
+ *(.ctors)
+
+ /* .dtors */
+ *crtbegin.o(.dtors)
+ *crtbegin?.o(.dtors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+ *(SORT(.dtors.*))
+ *(.dtors)
+
+ *(.rodata*)
+
+ KEEP(*(.eh_frame*))
+
+ /* section information for ln_at */
+ . = ALIGN(4);
+ __ln_at_cmd_tbl_start = .;
+ KEEP(*(ln_at_cmd_tbl))
+ __ln_at_cmd_tbl_end = .;
+ } >FLASH
+
+ /* .stack_dummy section doesn't contain any symbols. It is only
+ * used for linker to calculate size of stack sections, and assign
+ * values to stack symbols later */
+ .stack_dummy (COPY):
+ {
+ PROVIDE(__stack_start__ = .);
+ KEEP(*(.stack*))
+ PROVIDE(__c_stack_top__ = .);
+ PROVIDE(__stack_end__ = .);
+ } >RAM0
+
+ /* Location counter can end up 2byte aligned with narrow Thumb code but
+ __etext is assumed by startup code to be the LMA of a section in RAM
+ which must be 4byte aligned */
+ __etext = ALIGN (4);
+ .bss_ram0 (NOLOAD):
+ {
+ . = ALIGN(4);
+ __bss_ram0_start__ = .;
+ *memp.o(.bss* COMMON)
+ *(wlan_mem_local)
+ *(wlan_mem_pkt)
+ *(wlan_mem_dscr)
+ *(.bss*)
+ *(COMMON)
+ . = ALIGN(4);
+ __bss_ram0_end__ = .;
+ } >RAM0
+
+ .no_init_data (NOLOAD):
+ {
+ . = ALIGN(4);
+ *(.no_init_data)
+ *(.noinit .noinit.*)
+ . = ALIGN(4);
+ __retention_start__ = .;
+ *(retention_data)
+ . = ALIGN(4);
+ __retention_end__ = .;
+ } >RETENTION
+
+ /* Group unwind sections together: */
+ .ARM.extab : { *(.ARM.extab*) }
+ .ARM.exidx : { *(.ARM.exidx*) }
+
+ /DISCARD/ : {
+ *(.ARM.exidx.exit.text)
+ *(.ARM.extab.exit.text)
+ *(.ARM.exidx.devexit.text)
+ *(.ARM.extab.devexit.text)
+ }
+
+ /* Set stack top to end of RAM, and stack limit move down by
+ * size of stack_dummy section */
+ PROVIDE(__StackTop = __c_stack_top__);
+ PROVIDE(__StackLimit = __stack_start__);
+ PROVIDE(__stack = __StackTop);
+
+ PROVIDE(heap0_start = __bss_ram0_end__);
+ PROVIDE(heap0_end = ORIGIN(RAM0) + LENGTH(RAM0)); /* RAM0 end */
+ PROVIDE(heap0_len = heap0_end - heap0_start);
+
+
+ /* Check if data + heap + stack exceeds RAM limit */
+ /* ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") */
+ ASSERT(heap0_start < heap0_end, "region RAM0 overflowed with .bss")
+}
diff --git a/project/mcu_peripheral_driver_demo/GPIO/keil_ln882h_dev/.gitignore b/project/mcu_peripheral_driver_demo/GPIO/keil_ln882h_dev/.gitignore
new file mode 100644
index 0000000000000000000000000000000000000000..6e579d1c68dece00034c852ae807379e617dd9da
--- /dev/null
+++ b/project/mcu_peripheral_driver_demo/GPIO/keil_ln882h_dev/.gitignore
@@ -0,0 +1,8 @@
+/Listings/
+/Objects/
+*.uvguix.*
+JLinkLog.txt
+*.bin
+*.asm
+*.scvd
+*trace.dat
\ No newline at end of file
diff --git a/project/mcu_peripheral_driver_demo/GPIO/keil_ln882h_dev/JLinkSettings.ini b/project/mcu_peripheral_driver_demo/GPIO/keil_ln882h_dev/JLinkSettings.ini
new file mode 100644
index 0000000000000000000000000000000000000000..fcfe03725fdb0d7e6b09d6fc0fcdd5b1c4bcd969
--- /dev/null
+++ b/project/mcu_peripheral_driver_demo/GPIO/keil_ln882h_dev/JLinkSettings.ini
@@ -0,0 +1,39 @@
+[BREAKPOINTS]
+ForceImpTypeAny = 0
+ShowInfoWin = 1
+EnableFlashBP = 2
+BPDuringExecution = 0
+[CFI]
+CFISize = 0x00
+CFIAddr = 0x00
+[CPU]
+MonModeVTableAddr = 0xFFFFFFFF
+MonModeDebug = 0
+MaxNumAPs = 0
+LowPowerHandlingMode = 0
+OverrideMemMap = 0
+AllowSimulation = 1
+ScriptFile=""
+[FLASH]
+CacheExcludeSize = 0x00
+CacheExcludeAddr = 0x00
+MinNumBytesFlashDL = 0
+SkipProgOnCRCMatch = 1
+VerifyDownload = 1
+AllowCaching = 1
+EnableFlashDL = 2
+Override = 1
+Device="Cortex-M0+"
+[GENERAL]
+WorkRAMSize = 0x00
+WorkRAMAddr = 0x00
+RAMUsageLimit = 0x00
+[SWO]
+SWOLogFile=""
+[MEM]
+RdOverrideOrMask = 0x00
+RdOverrideAndMask = 0xFFFFFFFF
+RdOverrideAddr = 0xFFFFFFFF
+WrOverrideOrMask = 0x00
+WrOverrideAndMask = 0xFFFFFFFF
+WrOverrideAddr = 0xFFFFFFFF
diff --git a/project/mcu_peripheral_driver_demo/GPIO/keil_ln882h_dev/firmware_xip.uvoptx b/project/mcu_peripheral_driver_demo/GPIO/keil_ln882h_dev/firmware_xip.uvoptx
new file mode 100644
index 0000000000000000000000000000000000000000..d07203e6dc0b41fa1ea4c3a55f71d8f01e71e1ae
--- /dev/null
+++ b/project/mcu_peripheral_driver_demo/GPIO/keil_ln882h_dev/firmware_xip.uvoptx
@@ -0,0 +1,988 @@
+
+
+
+ 1.0
+
+ ### uVision Project, (C) Keil Software
+
+
+ *.c
+ *.s*; *.src; *.a*
+ *.obj; *.o
+ *.lib
+ *.txt; *.h; *.inc; *.md
+ *.plm
+ *.cpp
+ 0
+
+
+
+ 0
+ 0
+
+
+
+ mcu_xip
+ 0x4
+ ARM-ADS
+
+ 12000000
+
+ 1
+ 1
+ 0
+ 1
+ 0
+
+
+ 1
+ 65535
+ 0
+ 0
+ 0
+
+
+ 79
+ 66
+ 8
+ .\Listings\
+
+
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+
+
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+
+
+ 1
+ 0
+ 1
+
+ 7
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 1
+ 0
+ 0
+ 4
+
+
+
+
+
+
+
+
+
+
+ Segger\JL2CM3.dll
+
+
+
+ 0
+ DLGUARM
+
+
+
+ 0
+ JL2CM3
+ -U174402503 -O78 -S8 -ZTIFSpeedSel50000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO283 -TC40000000 -TP21 -TDS8008 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB2 -TFE1 -FO15 -FD20000000 -FC1000 -FN0
+
+
+ 0
+ UL2CM3
+ UL2CM3(-S0 -C0 -P0 ) -FC1000 -FD20000000
+
+
+ 0
+ ARMRTXEVENTFLAGS
+ -L70 -Z18 -C0 -M0 -T1
+
+
+ 0
+ DLGTARM
+ (1010=0,0,450,557,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)
+
+
+ 0
+ ARMDBGFLAGS
+
+
+
+
+
+ 0
+ 0
+ 20
+ 1
+ 268472584
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ ..\app\main.c
+
+ \\firmware_xip\../app/main.c\20
+
+
+
+
+ 0
+ 1
+ DMA
+
+
+ 1
+ 1
+ CACHE
+
+
+ 2
+ 1
+ CMP
+
+
+ 3
+ 1
+ ADC
+
+
+ 4
+ 1
+ ADV_TIMER_ISR
+
+
+ 5
+ 1
+ ADV_TIMER_0,0x0A
+
+
+ 6
+ 1
+ ADV_TIMER_1
+
+
+ 7
+ 1
+ ADV_TIMER_2
+
+
+ 8
+ 1
+ ADV_TIMER_3
+
+
+ 9
+ 1
+ ADV_TIMER_4
+
+
+ 10
+ 1
+ ADV_TIMER_5
+
+
+ 11
+ 1
+ EFUSE
+
+
+ 12
+ 1
+ UART0
+
+
+ 13
+ 1
+ UART1
+
+
+ 14
+ 1
+ UART2
+
+
+ 15
+ 1
+ SPI0
+
+
+ 16
+ 1
+ SPI1
+
+
+ 17
+ 1
+ WS2811
+
+
+ 18
+ 1
+ I2C
+
+
+ 19
+ 1
+ I2S
+
+
+ 20
+ 1
+ TIMER0
+
+
+ 21
+ 1
+ TIMER1
+
+
+ 22
+ 1
+ TIMER2
+
+
+ 23
+ 1
+ TIMER3
+
+
+ 24
+ 1
+ WDT
+
+
+ 25
+ 1
+ GPIOA
+
+
+ 26
+ 1
+ GPIOB
+
+
+ 27
+ 1
+ TRNG
+
+
+ 28
+ 1
+ AWO
+
+
+ 29
+ 1
+ RTC
+
+
+ 30
+ 1
+ QSPI
+
+
+ 31
+ 1
+ SDIO
+
+
+ 32
+ 1
+ AES
+
+
+ 33
+ 1
+ pin_sta,0x0A
+
+
+ 34
+ 1
+ pin_sta
+
+
+
+
+ 0
+ 2
+ id
+
+
+ 1
+ 2
+ address
+
+
+ 2
+ 2
+ dev_addr
+
+
+ 3
+ 2
+ address_num
+
+
+ 4
+ 2
+ buf_len
+
+
+ 5
+ 2
+ UART0
+
+
+ 6
+ 2
+ \\firmware_xip\../bsp/ln_show_reg.c\UART0->uart_cr3.val
+
+
+ 7
+ 2
+ hal_clock_apb0_clk,0x0A
+
+
+ 8
+ 2
+ output_data
+
+
+ 9
+ 2
+ data_2
+
+
+ 10
+ 2
+ i2c_init
+
+
+ 11
+ 2
+ i2c_init
+
+
+ 12
+ 2
+ hal_clock_apb0_clk,0x0A
+
+
+ 13
+ 2
+ i2c_init
+
+
+ 14
+ 2
+ i2c_init
+
+
+ 15
+ 2
+ addr_num
+
+
+ 16
+ 2
+ rx_data
+
+
+ 17
+ 2
+ status
+
+
+ 18
+ 2
+ \\firmware_xip\../app/main.c\status
+
+
+
+
+ 1
+ 0
+ hal_clock_apb0_clk
+ 0
+
+
+
+
+ 2
+ 1
+ rx_data_2
+ 0
+
+
+
+
+ 3
+ 1
+ 0x50000000
+ 0
+
+
+
+ 0
+
+
+ 0
+ 1
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+
+
+
+ 0
+ 0
+ 0
+
+
+
+
+
+
+
+
+
+
+
+
+ cpu
+ 1
+ 0
+ 0
+ 0
+
+ 1
+ 1
+ 2
+ 0
+ 0
+ 0
+ ..\startup\startup_ln882h.S
+ startup_ln882h.S
+ 0
+ 0
+
+
+ 1
+ 2
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\..\mcu\ln882h\system_ln882h.c
+ system_ln882h.c
+ 0
+ 0
+
+
+
+
+ main
+ 1
+ 0
+ 0
+ 0
+
+ 2
+ 3
+ 1
+ 0
+ 0
+ 0
+ ..\app\main.c
+ main.c
+ 0
+ 0
+
+
+
+
+ bsp
+ 1
+ 0
+ 0
+ 0
+
+ 3
+ 4
+ 1
+ 0
+ 0
+ 0
+ ..\bsp\serial_hw.c
+ serial_hw.c
+ 0
+ 0
+
+
+ 3
+ 5
+ 1
+ 0
+ 0
+ 0
+ ..\bsp\ln_show_reg.c
+ ln_show_reg.c
+ 0
+ 0
+
+
+ 3
+ 6
+ 1
+ 0
+ 0
+ 0
+ ..\bsp\ln_test_common.c
+ ln_test_common.c
+ 0
+ 0
+
+
+
+
+ drv_hal
+ 1
+ 0
+ 0
+ 0
+
+ 4
+ 7
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_adc.c
+ hal_adc.c
+ 0
+ 0
+
+
+ 4
+ 8
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_aes.c
+ hal_aes.c
+ 0
+ 0
+
+
+ 4
+ 9
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_cache.c
+ hal_cache.c
+ 0
+ 0
+
+
+ 4
+ 10
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_common.c
+ hal_common.c
+ 0
+ 0
+
+
+ 4
+ 11
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_dma.c
+ hal_dma.c
+ 0
+ 0
+
+
+ 4
+ 12
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_ext.c
+ hal_ext.c
+ 0
+ 0
+
+
+ 4
+ 13
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_flash.c
+ hal_flash.c
+ 0
+ 0
+
+
+ 4
+ 14
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_gpio.c
+ hal_gpio.c
+ 0
+ 0
+
+
+ 4
+ 15
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_i2s.c
+ hal_i2s.c
+ 0
+ 0
+
+
+ 4
+ 16
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_it.c
+ hal_it.c
+ 0
+ 0
+
+
+ 4
+ 17
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_i2c.c
+ hal_i2c.c
+ 0
+ 0
+
+
+ 4
+ 18
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_qspi.c
+ hal_qspi.c
+ 0
+ 0
+
+
+ 4
+ 19
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_rtc.c
+ hal_rtc.c
+ 0
+ 0
+
+
+ 4
+ 20
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_spi.c
+ hal_spi.c
+ 0
+ 0
+
+
+ 4
+ 21
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_timer.c
+ hal_timer.c
+ 0
+ 0
+
+
+ 4
+ 22
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_trng.c
+ hal_trng.c
+ 0
+ 0
+
+
+ 4
+ 23
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_uart.c
+ hal_uart.c
+ 0
+ 0
+
+
+ 4
+ 24
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_wdt.c
+ hal_wdt.c
+ 0
+ 0
+
+
+ 4
+ 25
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_ws2811.c
+ hal_ws2811.c
+ 0
+ 0
+
+
+ 4
+ 26
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_misc.c
+ hal_misc.c
+ 0
+ 0
+
+
+ 4
+ 27
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_clock.c
+ hal_clock.c
+ 0
+ 0
+
+
+ 4
+ 28
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_adv_timer.c
+ hal_adv_timer.c
+ 0
+ 0
+
+
+ 4
+ 29
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_sdio_device.c
+ hal_sdio_device.c
+ 0
+ 0
+
+
+ 4
+ 30
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_efuse.c
+ hal_efuse.c
+ 0
+ 0
+
+
+
+
+ util
+ 1
+ 0
+ 0
+ 0
+
+ 5
+ 31
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\..\components\utils\fifo\fifobuf.c
+ fifobuf.c
+ 0
+ 0
+
+
+
+
+ debug
+ 1
+ 0
+ 0
+ 0
+
+ 6
+ 32
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\..\components\utils\debug\ln_assert.c
+ ln_assert.c
+ 0
+ 0
+
+
+ 6
+ 33
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\..\components\utils\debug\log.c
+ log.c
+ 0
+ 0
+
+
+ 6
+ 34
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\..\components\utils\wrap_stdio.c
+ wrap_stdio.c
+ 0
+ 0
+
+
+
+
+ serial
+ 1
+ 0
+ 0
+ 0
+
+ 7
+ 35
+ 1
+ 0
+ 0
+ 0
+ ..\..\..\..\components\serial\serial.c
+ serial.c
+ 0
+ 0
+
+
+
+
diff --git a/project/mcu_peripheral_driver_demo/GPIO/keil_ln882h_dev/firmware_xip.uvprojx b/project/mcu_peripheral_driver_demo/GPIO/keil_ln882h_dev/firmware_xip.uvprojx
new file mode 100644
index 0000000000000000000000000000000000000000..8aaeff49b3685ec4a3231dfae84354488739aad8
--- /dev/null
+++ b/project/mcu_peripheral_driver_demo/GPIO/keil_ln882h_dev/firmware_xip.uvprojx
@@ -0,0 +1,612 @@
+
+
+
+ 2.1
+
+ ### uVision Project, (C) Keil Software
+
+
+
+ mcu_xip
+ 0x4
+ ARM-ADS
+ 5060960::V5.06 update 7 (build 960)::.\ARMCC
+ 0
+
+
+ ARMCM4_FP
+ ARM
+ ARM.CMSIS.5.3.0
+ http://www.keil.com/pack/
+ IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ESEL ELITTLE
+
+
+ UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)
+ 0
+ $$Device:ARMCM4_FP$Device\ARM\ARMCM4\Include\ARMCM4_FP.h
+
+
+
+
+
+
+
+
+
+ $$Device:ARMCM4_FP$Device\ARM\SVD\ARMCM4.svd
+ 0
+ 0
+
+
+
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 1
+
+ .\Objects\
+ firmware_xip
+ 1
+ 0
+ 1
+ 1
+ 1
+ .\Listings\
+ 1
+ 0
+ 0
+
+ 0
+ 0
+
+
+ 0
+ 0
+ 0
+ 0
+
+
+ 1
+ 1
+ python ..\..\..\..\tools\python_scripts\sdk_env_check.py
+ python3 ..\..\..\..\tools\python_scripts\before_build_keil.py -p ..\cfg\flash_partition_cfg.json -o ..\cfg\flash_partition_table.h
+ 0
+ 0
+ 0
+ 0
+
+
+ 1
+ 0
+ python3 ..\..\..\..\tools\python_scripts\after_build_keil.py -k #P -o flashimage.bin --sdkroot ../../../../
+
+ 0
+ 0
+ 0
+ 0
+
+ 0
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 3
+
+
+ 1
+
+
+ SARMCM3.DLL
+ -MPU
+ DCM.DLL
+ -pCM4
+ SARMCM3.DLL
+ -MPU
+ TCM.DLL
+ -pCM4
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 16
+
+
+
+
+ 0
+ 1
+ 0
+ 1
+ 1
+ 4096
+
+ 1
+ BIN\UL2CM3.DLL
+ "..\..\..\..\tools\JFlash\JFlash.exe" (-openprj..\..\..\..\tools\JFlash\ln882h.jflash -open.\flashimage.bin,0x0 -programverify)
+ .\JLinkSettings.ini
+
+
+
+ 0
+
+
+
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 1
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ "Cortex-M4"
+
+ 0
+ 0
+ 0
+ 1
+ 1
+ 0
+ 0
+ 2
+ 0
+ 0
+ 0
+ 0
+ 8
+ 1
+ 1
+ 0
+ 0
+ 3
+ 3
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x20000000
+ 0x20000
+
+
+ 1
+ 0x0
+ 0x40000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 1
+ 0x0
+ 0x40000
+
+
+ 1
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x0
+ 0x0
+
+
+ 0
+ 0x20000000
+ 0x20000
+
+
+ 0
+ 0x0
+ 0x0
+
+
+
+
+
+ 1
+ 1
+ 0
+ 0
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 2
+ 0
+ 0
+ 1
+ 0
+ 0
+ 1
+ 1
+ 1
+ 1
+ 0
+ 0
+ 0
+
+
+ HAL_ASSERT_EN,LN882H
+
+ ..\app;..\bsp;..\cfg;..\startup;..\..\..\..\mcu\CMSIS_5.3.0;..\..\..\..\mcu\driver_ln882h\hal;..\..\..\..\mcu\driver_ln882h\reg;..\..\..\..\mcu\ln882h;..\..\..\..\mcu\driver_ln882h;..\..\..\..\components\utils;..\..\..\..\components;..\..\..\..\components\serial;..\..\..\..\components\utils\debug;..\..\..\..\components\kernel
+
+
+
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 1
+
+
+
+
+
+
+
+
+ 0
+ 0
+ 0
+ 0
+ 1
+ 0
+ 0x00000000
+ 0x20000000
+
+ ..\cfg\peripheral_test.sct
+
+
+
+
+
+
+
+
+
+
+ cpu
+
+
+ startup_ln882h.S
+ 2
+ ..\startup\startup_ln882h.S
+
+
+ system_ln882h.c
+ 1
+ ..\..\..\..\mcu\ln882h\system_ln882h.c
+
+
+
+
+ main
+
+
+ main.c
+ 1
+ ..\app\main.c
+
+
+
+
+ bsp
+
+
+ serial_hw.c
+ 1
+ ..\bsp\serial_hw.c
+
+
+ ln_show_reg.c
+ 1
+ ..\bsp\ln_show_reg.c
+
+
+ ln_test_common.c
+ 1
+ ..\bsp\ln_test_common.c
+
+
+
+
+ drv_hal
+
+
+ hal_adc.c
+ 1
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_adc.c
+
+
+ hal_aes.c
+ 1
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_aes.c
+
+
+ hal_cache.c
+ 1
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_cache.c
+
+
+ hal_common.c
+ 1
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_common.c
+
+
+ hal_dma.c
+ 1
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_dma.c
+
+
+ hal_ext.c
+ 1
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_ext.c
+
+
+ hal_flash.c
+ 1
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_flash.c
+
+
+ hal_gpio.c
+ 1
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_gpio.c
+
+
+ hal_i2s.c
+ 1
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_i2s.c
+
+
+ hal_it.c
+ 1
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_it.c
+
+
+ hal_i2c.c
+ 1
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_i2c.c
+
+
+ hal_qspi.c
+ 1
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_qspi.c
+
+
+ hal_rtc.c
+ 1
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_rtc.c
+
+
+ hal_spi.c
+ 1
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_spi.c
+
+
+ hal_timer.c
+ 1
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_timer.c
+
+
+ hal_trng.c
+ 1
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_trng.c
+
+
+ hal_uart.c
+ 1
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_uart.c
+
+
+ hal_wdt.c
+ 1
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_wdt.c
+
+
+ hal_ws2811.c
+ 1
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_ws2811.c
+
+
+ hal_misc.c
+ 1
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_misc.c
+
+
+ hal_clock.c
+ 1
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_clock.c
+
+
+ hal_adv_timer.c
+ 1
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_adv_timer.c
+
+
+ hal_sdio_device.c
+ 1
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_sdio_device.c
+
+
+ hal_efuse.c
+ 1
+ ..\..\..\..\mcu\driver_ln882h\hal\hal_efuse.c
+
+
+
+
+ util
+
+
+ fifobuf.c
+ 1
+ ..\..\..\..\components\utils\fifo\fifobuf.c
+
+
+
+
+ debug
+
+
+ ln_assert.c
+ 1
+ ..\..\..\..\components\utils\debug\ln_assert.c
+
+
+ log.c
+ 1
+ ..\..\..\..\components\utils\debug\log.c
+
+
+ wrap_stdio.c
+ 1
+ ..\..\..\..\components\utils\wrap_stdio.c
+
+
+
+
+ serial
+
+
+ serial.c
+ 1
+ ..\..\..\..\components\serial\serial.c
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ firmware_xip
+ 1
+
+
+
+
+
diff --git a/project/mcu_peripheral_driver_demo/GPIO/startup/startup_ln882h.S b/project/mcu_peripheral_driver_demo/GPIO/startup/startup_ln882h.S
new file mode 100644
index 0000000000000000000000000000000000000000..116819f5607a1b52dbf2293814adf665cd5cfec0
--- /dev/null
+++ b/project/mcu_peripheral_driver_demo/GPIO/startup/startup_ln882h.S
@@ -0,0 +1,297 @@
+;/**************************************************************************//**
+; * @file startup_ARMCM4.s
+; * @brief CMSIS Core Device Startup File for
+; * ARMCM4 Device Series
+; * @version V5.00
+; * @date 02. March 2016
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;/*
+;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------
+;*/
+
+
+; Stack Configuration
+; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Stack_Size EQU 0x00001800
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; Heap Configuration
+; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+;
+
+Heap_Size EQU 0x00000000
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+
+ PRESERVE8
+ THUMB
+
+
+; Vector Table Mapped to Address 0 at Reset
+
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+ EXPORT __Vectors_End
+ EXPORT __Vectors_Size
+
+__Vectors DCD __initial_sp ;(0x00)Top of Stack
+ DCD Reset_Handler ;(0x04)IRQ -15 Reset Handler
+ DCD NMI_Handler ;(0x08)IRQ -14 NMI Handler
+ DCD HardFault_Handler ;(0x0C)IRQ -13 Hard Fault Handler
+ DCD MemManage_Handler ;(0x10)IRQ -12 MPU Fault Handler
+ DCD BusFault_Handler ;(0x14)IRQ -11 Bus Fault Handler
+ DCD UsageFault_Handler ;(0x18)IRQ -10 Usage Fault Handler
+ DCD 0 ;(0x1C)IRQ -9 Reserved
+ DCD 0 ;(0x20)IRQ -8 Reserved
+ DCD 0 ;(0x24)IRQ -7 Reserved
+ DCD 0 ;(0x28)IRQ -6 Reserved
+ DCD SVC_Handler ;(0x2C)IRQ -5 SVCall Handler
+ DCD DebugMon_Handler ;(0x30)IRQ -4 Debug Monitor Handler
+ DCD 0 ;(0x34)IRQ -3 Reserved
+ DCD PendSV_Handler ;(0x38)IRQ -2 PendSV Handler
+ DCD SysTick_Handler ;(0x3C)IRQ -1 SysTick Handler
+
+ ; External Interrupts
+ DCD WDT_IRQHandler ;(0x40)IRQ0
+ DCD EXT_IRQHandler ;(0x44)IRQ1
+ DCD RTC_IRQHandler ;(0x48)IRQ2
+ DCD RFSLP_IRQHandler ;(0x4C)IRQ3
+ DCD MAC_IRQHandler ;(0x50)IRQ4
+ DCD BLE_WAKE_IRQHandler ;(0x54)IRQ5
+ DCD BLE_ERR_IRQHandler ;(0x58)IRQ6
+ DCD BLE_MAC_IRQHandler ;(0x5C)IRQ7
+ DCD DMA_IRQHandler ;(0x60)IRQ8
+ DCD QSPI_IRQHandler ;(0x64)IRQ9
+ DCD SDIO_F1_IRQHandler ;(0x68)IRQ10
+ DCD SDIO_F2_IRQHandler ;(0x6C)IRQ11
+ DCD SDIO_F3_IRQHandler ;(0x70)IRQ12
+ DCD CM4_FPIXC_IRQHandler ;(0x74)IRQ13
+ DCD CM4_FPOFC_IRQHandler ;(0x78)IRQ14
+ DCD CM4_FPUFC_IRQHandler ;(0x7C)IRQ15
+ DCD CM4_FPIOC_IRQHandler ;(0x80)IRQ16
+ DCD CM4_FPDZC_IRQHandler ;(0x84)IRQ17
+ DCD CM4_FPIDC_IRQHandler ;(0x88)IRQ18
+ DCD I2C_IRQHandler ;(0x8C)IRQ19
+ DCD SPI0_IRQHandler ;(0x90)IRQ20
+ DCD SPI1_IRQHandler ;(0x94)IRQ21
+ DCD UART0_IRQHandler ;(0x98)IRQ22
+ DCD UART1_IRQHandler ;(0x9C)IRQ23
+ DCD UART2_IRQHandler ;(0xA0)IRQ24
+ DCD ADC_IRQHandler ;(0xA4)IRQ25
+ DCD WS2811_IRQHandler ;(0xA8)IRQ26
+ DCD I2S_IRQHandler ;(0xAC)IRQ27
+ DCD GPIOA_IRQHandler ;(0xB0)IRQ28
+ DCD GPIOB_IRQHandler ;(0xB4)IRQ29
+ DCD TIMER0_IRQHandler ;(0xB8)IRQ30
+ DCD TIMER1_IRQHandler ;(0xBC)IRQ31
+ DCD TIMER2_IRQHandler ;(0xC0)IRQ32
+ DCD TIMER3_IRQHandler ;(0xC4)IRQ33
+ DCD ADV_TIMER_IRQHandler ;(0xC8)IRQ34
+ DCD AES_IRQHandler ;(0xCC)IRQ35
+ DCD TRNG_IRQHandler ;(0xD0)IRQ36
+ DCD PAOTD_IRQHandler ;(0xD4)IRQ37
+
+__Vectors_End
+
+__Vectors_Size EQU __Vectors_End - __Vectors
+
+ AREA |.text|, CODE, READONLY
+
+
+; Reset Handler
+
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+ LDR R4, =SystemInit
+ BLX R4
+ LDR R4, =__main
+ BX R4
+ ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+
+ EXPORT WDT_IRQHandler [WEAK];(0x40)IRQ0
+ EXPORT EXT_IRQHandler [WEAK];(0x44)IRQ1
+ EXPORT RTC_IRQHandler [WEAK];(0x48)IRQ2
+ EXPORT RFSLP_IRQHandler [WEAK];(0x4C)IRQ3
+ EXPORT MAC_IRQHandler [WEAK];(0x50)IRQ4
+ EXPORT BLE_WAKE_IRQHandler [WEAK];(0x54)IRQ5
+ EXPORT BLE_ERR_IRQHandler [WEAK];(0x58)IRQ6
+ EXPORT BLE_MAC_IRQHandler [WEAK];(0x5C)IRQ7
+ EXPORT DMA_IRQHandler [WEAK];(0x60)IRQ8
+ EXPORT QSPI_IRQHandler [WEAK];(0x64)IRQ9
+ EXPORT SDIO_F1_IRQHandler [WEAK];(0x68)IRQ10
+ EXPORT SDIO_F2_IRQHandler [WEAK];(0x6C)IRQ11
+ EXPORT SDIO_F3_IRQHandler [WEAK];(0x70)IRQ12
+ EXPORT CM4_FPIXC_IRQHandler [WEAK];(0x74)IRQ13
+ EXPORT CM4_FPOFC_IRQHandler [WEAK];(0x78)IRQ14
+ EXPORT CM4_FPUFC_IRQHandler [WEAK];(0x7C)IRQ15
+ EXPORT CM4_FPIOC_IRQHandler [WEAK];(0x80)IRQ16
+ EXPORT CM4_FPDZC_IRQHandler [WEAK];(0x84)IRQ17
+ EXPORT CM4_FPIDC_IRQHandler [WEAK];(0x88)IRQ18
+ EXPORT I2C_IRQHandler [WEAK];(0x8C)IRQ19
+ EXPORT SPI0_IRQHandler [WEAK];(0x90)IRQ20
+ EXPORT SPI1_IRQHandler [WEAK];(0x94)IRQ21
+ EXPORT UART0_IRQHandler [WEAK];(0x98)IRQ22
+ EXPORT UART1_IRQHandler [WEAK];(0x9C)IRQ23
+ EXPORT UART2_IRQHandler [WEAK];(0xA0)IRQ24
+ EXPORT ADC_IRQHandler [WEAK];(0xA4)IRQ25
+ EXPORT WS2811_IRQHandler [WEAK];(0xA8)IRQ26
+ EXPORT I2S_IRQHandler [WEAK];(0xAC)IRQ27
+ EXPORT GPIOA_IRQHandler [WEAK];(0xB0)IRQ28
+ EXPORT GPIOB_IRQHandler [WEAK];(0xB4)IRQ29
+ EXPORT TIMER0_IRQHandler [WEAK];(0xB8)IRQ30
+ EXPORT TIMER1_IRQHandler [WEAK];(0xBC)IRQ31
+ EXPORT TIMER2_IRQHandler [WEAK];(0xC0)IRQ32
+ EXPORT TIMER3_IRQHandler [WEAK];(0xC4)IRQ33
+ EXPORT ADV_TIMER_IRQHandler [WEAK];(0xC8)IRQ34
+ EXPORT AES_IRQHandler [WEAK];(0xCC)IRQ35
+ EXPORT TRNG_IRQHandler [WEAK];(0xD0)IRQ36
+ EXPORT PAOTD_IRQHandler [WEAK];(0xD4)IRQ37
+
+
+WDT_IRQHandler ;(0x40)IRQ0
+EXT_IRQHandler ;(0x44)IRQ1
+RTC_IRQHandler ;(0x48)IRQ2
+RFSLP_IRQHandler ;(0x4C)IRQ3
+MAC_IRQHandler ;(0x50)IRQ4
+BLE_WAKE_IRQHandler ;(0x54)IRQ5
+BLE_ERR_IRQHandler ;(0x58)IRQ6
+BLE_MAC_IRQHandler ;(0x5C)IRQ7
+DMA_IRQHandler ;(0x60)IRQ8
+QSPI_IRQHandler ;(0x64)IRQ9
+SDIO_F1_IRQHandler ;(0x68)IRQ10
+SDIO_F2_IRQHandler ;(0x6C)IRQ11
+SDIO_F3_IRQHandler ;(0x70)IRQ12
+CM4_FPIXC_IRQHandler ;(0x74)IRQ13
+CM4_FPOFC_IRQHandler ;(0x78)IRQ14
+CM4_FPUFC_IRQHandler ;(0x7C)IRQ15
+CM4_FPIOC_IRQHandler ;(0x80)IRQ16
+CM4_FPDZC_IRQHandler ;(0x84)IRQ17
+CM4_FPIDC_IRQHandler ;(0x88)IRQ18
+I2C_IRQHandler ;(0x8C)IRQ19
+SPI0_IRQHandler ;(0x90)IRQ20
+SPI1_IRQHandler ;(0x94)IRQ21
+UART0_IRQHandler ;(0x98)IRQ22
+UART1_IRQHandler ;(0x9C)IRQ23
+UART2_IRQHandler ;(0xA0)IRQ24
+ADC_IRQHandler ;(0xA4)IRQ25
+WS2811_IRQHandler ;(0xA8)IRQ26
+I2S_IRQHandler ;(0xAC)IRQ27
+GPIOA_IRQHandler ;(0xB0)IRQ28
+GPIOB_IRQHandler ;(0xB4)IRQ29
+TIMER0_IRQHandler ;(0xB8)IRQ30
+TIMER1_IRQHandler ;(0xBC)IRQ31
+TIMER2_IRQHandler ;(0xC0)IRQ32
+TIMER3_IRQHandler ;(0xC4)IRQ33
+ADV_TIMER_IRQHandler ;(0xC8)IRQ34
+AES_IRQHandler ;(0xCC)IRQ35
+TRNG_IRQHandler ;(0xD0)IRQ36
+PAOTD_IRQHandler ;(0xD4)IRQ37
+ B .
+ ENDP
+ ALIGN
+
+
+; User Initial Stack & Heap
+
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+
+__user_initial_stackheap PROC
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+ ENDP
+
+ ALIGN
+
+ ENDIF
+
+
+ END
diff --git a/project/mcu_peripheral_driver_demo/GPIO/startup/startup_ln882h_gcc.c b/project/mcu_peripheral_driver_demo/GPIO/startup/startup_ln882h_gcc.c
new file mode 100644
index 0000000000000000000000000000000000000000..5bfd93c97d4af15730dfc11a34ca7bcf91c161a5
--- /dev/null
+++ b/project/mcu_peripheral_driver_demo/GPIO/startup/startup_ln882h_gcc.c
@@ -0,0 +1,241 @@
+
+#include "ln882h.h"
+
+
+/*----------------------------------------------------------------------------
+ Linker generated Symbols
+ *----------------------------------------------------------------------------*/
+extern uint32_t __copysection_ram0_load;
+extern uint32_t __copysection_ram0_start;
+extern uint32_t __copysection_ram0_end;
+extern uint32_t __etext;
+extern uint32_t __bss_ram0_start__;
+extern uint32_t __bss_ram0_end__;
+extern uint32_t __StackTop;
+extern uint32_t __retention_start__;
+extern uint32_t __retention_end__;
+
+
+/*----------------------------------------------------------------------------
+ Exception / Interrupt Handler Function Prototype
+ *----------------------------------------------------------------------------*/
+typedef void( *pFunc )( void );
+
+
+/*----------------------------------------------------------------------------
+ External References
+ *----------------------------------------------------------------------------*/
+//extern void _start (void) __attribute__((noreturn)); /* PreeMain (C library entry point) */
+extern int main (int argc, char* argv[]);
+
+
+/*----------------------------------------------------------------------------
+ Internal References
+ *----------------------------------------------------------------------------*/
+void Default_Handler(void) __attribute__ ((noreturn));
+void Reset_Handler (void) __attribute__ ((noreturn));
+
+
+/*----------------------------------------------------------------------------
+ User Initial Stack & Heap
+ *----------------------------------------------------------------------------*/
+// Stack Configuration
+// Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+//
+#define __STACK_SIZE 0x00002000
+static uint8_t stack[__STACK_SIZE] __attribute__ ((aligned(8), used, section(".stack")));
+
+#if 0
+// Heap Configuration
+// Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+//
+#define __HEAP_SIZE 0x00004000
+#if __HEAP_SIZE > 0
+static uint8_t heap[__HEAP_SIZE] __attribute__ ((aligned(8), used, section(".heap")));
+#endif
+#endif
+
+
+/*----------------------------------------------------------------------------
+ Exception / Interrupt Handler
+ *----------------------------------------------------------------------------*/
+/* Exceptions */
+void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
+void HardFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
+void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
+void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
+void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
+void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
+void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
+void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
+void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
+
+void WDT_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void EXT_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void RTC_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void RFSLP_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+
+void MAC_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+
+void BLE_WAKE_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void BLE_ERR_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void BLE_MAC_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+
+void DMA_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void QSPI_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+
+void SDIO_F1_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void SDIO_F2_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void SDIO_F3_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+// void SDIO_ASYNC_HOST_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+// void SDIO_M2S_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+
+void CM4_FPIXC_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void CM4_FPOFC_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void CM4_FPUFC_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void CM4_FPIOC_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void CM4_FPDZC_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void CM4_FPIDC_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+
+void I2C_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+
+void SPI0_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void SPI1_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+
+void UART0_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void UART1_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void UART2_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+
+void ADC_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void WS_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void I2S_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+
+void GPIOA_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void GPIOB_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+
+void TIMER0_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void TIMER1_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void TIMER2_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void TIMER3_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void ADV_TIMER_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+
+void AES_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void TRNG_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+void PAOTD_IRQHandler (void) __attribute__ ((weak, alias("Default_Handler")));
+
+/*----------------------------------------------------------------------------
+ Exception / Interrupt Vector table
+ *----------------------------------------------------------------------------*/
+extern const pFunc __Vectors[240];
+const pFunc __Vectors[240] __attribute__ ((section(".vectors"))) = {
+ (pFunc)(&__StackTop), /* (0x00)Top of Stack */
+ Reset_Handler, /* (0x04)IRQ -15 Reset Handler */
+ NMI_Handler, /* (0x08)IRQ -14 NMI Handler */
+ HardFault_Handler, /* (0x0C)IRQ -13 Hard Fault Handler */
+ MemManage_Handler, /* (0x10)IRQ -12 MPU Fault Handler */
+ BusFault_Handler, /* (0x14)IRQ -11 Bus Fault Handler */
+ UsageFault_Handler, /* (0x18)IRQ -10 Usage Fault Handler */
+ 0, /* (0x1C)IRQ -9 Reserved */
+ 0, /* (0x20)IRQ -8 Reserved */
+ 0, /* (0x24)IRQ -7 Reserved */
+ 0, /* (0x28)IRQ -6 Reserved */
+ SVC_Handler, /* (0x2C)IRQ -5 SVCall Handler */
+ DebugMon_Handler, /* (0x30)IRQ -4 Debug Monitor Handler */
+ 0, /* (0x34)IRQ -3 Reserved */
+ PendSV_Handler, /* (0x38)IRQ -2 PendSV Handler */
+ SysTick_Handler, /* (0x3C)IRQ -1 SysTick Handler */
+
+ /* Interrupts */
+ WDT_IRQHandler, /* (0x40)IRQ0 */
+ EXT_IRQHandler, /* (0x44)IRQ1 */
+ RTC_IRQHandler, /* (0x48)IRQ2 */
+ RFSLP_IRQHandler, /* (0x4C)IRQ3 */
+ MAC_IRQHandler, /* (0x50)IRQ4 */
+ BLE_WAKE_IRQHandler, /* (0x54)IRQ5 */
+ BLE_ERR_IRQHandler, /* (0x58)IRQ6 */
+ BLE_MAC_IRQHandler, /* (0x5C)IRQ7 */
+ DMA_IRQHandler, /* (0x60)IRQ8 */
+ QSPI_IRQHandler, /* (0x64)IRQ9 */
+ SDIO_F1_IRQHandler, /* (0x68)IRQ10 */
+ SDIO_F2_IRQHandler, /* (0x6C)IRQ11 */
+ SDIO_F3_IRQHandler, /* (0x70)IRQ12 */
+ CM4_FPIXC_IRQHandler, /* (0x74)IRQ13 */
+ CM4_FPOFC_IRQHandler, /* (0x78)IRQ14 */
+ CM4_FPUFC_IRQHandler, /* (0x7C)IRQ15 */
+ CM4_FPIOC_IRQHandler, /* (0x80)IRQ16 */
+ CM4_FPDZC_IRQHandler, /* (0x84)IRQ17 */
+ CM4_FPIDC_IRQHandler, /* (0x88)IRQ18 */
+ I2C_IRQHandler, /* (0x8C)IRQ19 */
+ SPI0_IRQHandler, /* (0x90)IRQ20 */
+ SPI1_IRQHandler, /* (0x94)IRQ21 */
+ UART0_IRQHandler, /* (0x98)IRQ22 */
+ UART1_IRQHandler, /* (0x9C)IRQ23 */
+ UART2_IRQHandler, /* (0xA0)IRQ24 */
+ ADC_IRQHandler, /* (0xA4)IRQ25 */
+ WS_IRQHandler, /* (0xA8)IRQ26 */
+ I2S_IRQHandler, /* (0xAC)IRQ27 */
+ GPIOA_IRQHandler, /* (0xB0)IRQ28 */
+ GPIOB_IRQHandler, /* (0xB4)IRQ29 */
+ TIMER0_IRQHandler, /* (0xB8)IRQ30 */
+ TIMER1_IRQHandler, /* (0xBC)IRQ31 */
+ TIMER2_IRQHandler, /* (0xC0)IRQ32 */
+ TIMER3_IRQHandler, /* (0xC4)IRQ33 */
+ ADV_TIMER_IRQHandler, /* (0xC8)IRQ34 */
+ AES_IRQHandler, /* (0xCC)IRQ35 */
+ TRNG_IRQHandler, /* (0xD0)IRQ36 */
+ PAOTD_IRQHandler, /* (0xD4)IRQ37 */
+};
+
+/*----------------------------------------------------------------------------
+ Reset Handler called on controller reset
+ *----------------------------------------------------------------------------*/
+void Reset_Handler(void) {
+ uint32_t *pSrc, *pDest;
+ uint32_t *pTable __attribute__((unused));
+
+
+ /* Firstly it copies data from read only memory to RAM.
+ * There are two schemes to copy. One can copy more than one sections.
+ * Another can copy only one section. The former scheme needs more
+ * instructions and read-only data to implement than the latter.
+ * Macro __STARTUP_COPY_MULTIPLE is used to choose between two schemes.
+ */
+ pSrc = &__copysection_ram0_load;
+ pDest = &__copysection_ram0_start;
+
+ for ( ; (pDest < &__copysection_ram0_end); ) {
+ *pDest++ = *pSrc++;
+ }
+
+
+
+ /* Single BSS section scheme.
+ *
+ * The BSS section is specified by following symbols
+ * __bss_start__: start of the BSS section.
+ * __bss_end__: end of the BSS section.
+ *
+ * Both addresses must be aligned to 4 bytes boundary.
+ */
+ pDest = &__bss_ram0_start__;
+ for ( ; pDest < &__bss_ram0_end__ ; ) {
+ *pDest++ = 0UL;
+ }
+
+ pDest = &__retention_start__;
+ for ( ; pDest < &__retention_end__ ; ) {
+ *pDest++ = 0UL;
+ }
+
+ SystemInit(); /* CMSIS System Initialization */
+ main(0, NULL);
+}
+
+
+/*----------------------------------------------------------------------------
+ Default Handler for Exceptions / Interrupts
+ *----------------------------------------------------------------------------*/
+void Default_Handler(void) {
+
+ while(1);
+}
diff --git a/project/mcu_peripheral_driver_demo/PWM/app/main.c b/project/mcu_peripheral_driver_demo/PWM/app/main.c
index ea4d94fd50e7c2be190f622b3f2ce0be72b21bf7..bc7e52e05d4f3f1b8d71c16b8b1bf5f0c80f93e7 100644
--- a/project/mcu_peripheral_driver_demo/PWM/app/main.c
+++ b/project/mcu_peripheral_driver_demo/PWM/app/main.c
@@ -20,11 +20,6 @@
#include "ln_drv_pwm.h"
-/*
- * 注意！！！
- * 在驱动例程中，有一些函数的参数是指向字符串（数组）地址的指针，函数中没有检查这些指针的有效性，
- * 没有判断指针是否为空，也没有判断指针指向的数据是否还有剩余空间，这些都需要使用者自行决定！！！
-*/
int main (int argc, char* argv[])
{
uint32_t pwm_duty = 0;
@@ -36,18 +31,22 @@ int main (int argc, char* argv[])
ln_show_reg_init();
/****************** 2. 外设配置 ***********************/
- pwm_init(1000,500,PWM_CHA_0,GPIO_B,GPIO_PIN_5); //初始化PWM
+ pwm_init(10000,20,PWM_CHA_0,GPIO_B,GPIO_PIN_5); //初始化PWM,设置频率为10K,占空比为20%
+ pwm_init(10000,20,PWM_CHA_1,GPIO_B,GPIO_PIN_6); //初始化PWM
+ pwm_init(10000,20,PWM_CHA_2,GPIO_B,GPIO_PIN_7); //初始化PWM
pwm_start(PWM_CHA_0); //开始产生PWM
while(1)
{
pwm_duty ++;
- if(pwm_duty > 1000) pwm_duty = 0;
+ if(pwm_duty > 100) pwm_duty = 0;
pwm_set_duty(pwm_duty,PWM_CHA_0); //配置占空比
+ pwm_set_duty(pwm_duty,PWM_CHA_1);
+ pwm_set_duty(pwm_duty,PWM_CHA_2);
LOG(LOG_LVL_INFO,"ln882H running! \n");
- LOG(LOG_LVL_INFO,"Duty = %d, Freq = %d! \n",pwm_get_duty(PWM_CHA_0),pwm_get_freq(PWM_CHA_0));
+ LOG(LOG_LVL_INFO,"Duty = %f\n",pwm_get_duty(PWM_CHA_0));
ln_delay_ms(100);
}
diff --git a/project/mcu_peripheral_driver_demo/PWM/bsp/ln_drv_pwm.c b/project/mcu_peripheral_driver_demo/PWM/bsp/ln_drv_pwm.c
index e6ef3f5f3b2b129389f4c8609bc6aa8eda8fb33e..a7a5d77885b70043c29985950079241400913ebc 100644
--- a/project/mcu_peripheral_driver_demo/PWM/bsp/ln_drv_pwm.c
+++ b/project/mcu_peripheral_driver_demo/PWM/bsp/ln_drv_pwm.c
@@ -13,13 +13,13 @@
/**
* @brief PWM初始化
*
- * @param period 设置PWM周期，单位us，范围 0 ~ 1638us(未分频)
- * @param duty 设置PWM占空比，单位us，范围 0 ~ 1638us(未分频)
- * @param pwm_channel_num 设置通道号，0 ~ 11
- * @param gpio_port 设置PWM GPIO端口
- * @param gpio_pin 设置PWM GPIO引脚
+ * @param freq 设置PWM频率， 单位hz,范围 100hz ~ 20Mhz
+ * @param duty 设置PWM占空比，单位%，范围 0% ~ 100%
+ * @param pwm_channel_num 设置通道号，0 ~ 11
+ * @param gpio_port 设置PWM GPIO端口
+ * @param gpio_pin 设置PWM GPIO引脚
*/
-void pwm_init(uint32_t period, uint32_t duty,pwm_channel_t pwm_channel_num,gpio_port_t gpio_port,gpio_pin_t gpio_pin)
+void pwm_init(uint32_t freq, float duty,pwm_channel_t pwm_channel_num,gpio_port_t gpio_port,gpio_pin_t gpio_pin)
{
uint32_t reg_base = 0;
uint32_t gpio_reg_base = 0;
@@ -55,18 +55,26 @@ void pwm_init(uint32_t period, uint32_t duty,pwm_channel_t pwm_channel_num,gpio_
adv_tim_init_t_def adv_tim_init;
memset(&adv_tim_init,0,sizeof(adv_tim_init));
- adv_tim_init.adv_tim_clk_div = 0; //设置时钟分频，0为不分频
- adv_tim_init.adv_tim_load_value = hal_clock_get_apb0_clk() / 1000000 * period - 1; //设置PWM频率
+ // 设置PWM频率
+ if(freq >= 10000){
+ adv_tim_init.adv_tim_clk_div = 0;
+ adv_tim_init.adv_tim_load_value = hal_clock_get_apb0_clk() * 1.0 / freq - 2;
+ }else{
+ adv_tim_init.adv_tim_clk_div = (uint32_t)(hal_clock_get_apb0_clk() / 1000000) - 1;
+ adv_tim_init.adv_tim_load_value = 1000000 / freq - 2;
+ }
+
+ // 设置PWM占空比
if((pwm_channel_num & 0x01) == 0)
- adv_tim_init.adv_tim_cmp_a_value = hal_clock_get_apb0_clk() / 1000000 * duty ; //设置通道a比较值
+ adv_tim_init.adv_tim_cmp_a_value = (adv_tim_init.adv_tim_load_value + 2) * duty / 100.0f; //设置通道a比较值
else
- adv_tim_init.adv_tim_cmp_b_value = hal_clock_get_apb0_clk() / 1000000 * duty ; //设置通道b比较值
+ adv_tim_init.adv_tim_cmp_b_value = (adv_tim_init.adv_tim_load_value + 2) * duty / 100.0f; //设置通道b比较值
- adv_tim_init.adv_tim_dead_gap_value = 0; //设置死区时间
- adv_tim_init.adv_tim_dead_en = ADV_TIMER_DEAD_DIS; //不开启死区
- adv_tim_init.adv_tim_cnt_mode = ADV_TIMER_CNT_MODE_INC; //向上计数模式
- adv_tim_init.adv_tim_cha_inv_en = ADV_TIMER_CHA_INV_EN;
- adv_tim_init.adv_tim_chb_inv_en = ADV_TIMER_CHB_INV_EN;
+ adv_tim_init.adv_tim_dead_gap_value = 0; //设置死区时间
+ adv_tim_init.adv_tim_dead_en = ADV_TIMER_DEAD_DIS; //不开启死区
+ adv_tim_init.adv_tim_cnt_mode = ADV_TIMER_CNT_MODE_INC; //向上计数模式
+ adv_tim_init.adv_tim_cha_inv_en = ADV_TIMER_CHA_INV_EN;
+ adv_tim_init.adv_tim_chb_inv_en = ADV_TIMER_CHB_INV_EN;
hal_adv_tim_init(reg_base,&adv_tim_init);
}
@@ -103,10 +111,10 @@ void pwm_start(pwm_channel_t pwm_channel_num)
/**
* @brief 设置PWM占空比
*
- * @param duty 设置占空比，单位us，范围 0 ~ 1638us(未分频)
- * @param pwm_channel_num 设置通道号
+ * @param duty 设置PWM占空比，单位%，范围 0% ~ 100%
+ * @param pwm_channel_num 设置通道号
*/
-void pwm_set_duty(uint32_t duty, pwm_channel_t pwm_channel_num)
+void pwm_set_duty(float duty, pwm_channel_t pwm_channel_num)
{
uint32_t reg_base = 0;
switch(pwm_channel_num)
@@ -125,21 +133,21 @@ void pwm_set_duty(uint32_t duty, pwm_channel_t pwm_channel_num)
case PWM_CHA_11: reg_base = ADV_TIMER_5_BASE; break;
}
if((pwm_channel_num & 0x01) == 0)
- hal_adv_tim_set_comp_a(reg_base,hal_clock_get_apb0_clk() / 1000000 * duty); //设置通道a比较值
+ hal_adv_tim_set_comp_a(reg_base,(hal_adv_tim_get_load_value(reg_base) + 2) * duty / 100.0f); //设置通道a比较值
else
- hal_adv_tim_set_comp_b(reg_base,hal_clock_get_apb0_clk() / 1000000 * duty); //设置通道b比较值
+ hal_adv_tim_set_comp_b(reg_base,(hal_adv_tim_get_load_value(reg_base) + 2) * duty / 100.0f); //设置通道b比较值
}
/**
* @brief 获得对应通道的占空比
*
* @param pwm_channel_num 设置通道号
- * @return uint32_t 返回占空比，单位us
+ * @return uint32_t 返回PWM占空比，单位%，范围 0% ~ 100%
*/
-uint32_t pwm_get_duty(pwm_channel_t pwm_channel_num)
+float pwm_get_duty(pwm_channel_t pwm_channel_num)
{
uint32_t reg_base = 0;
- uint32_t ret_val = 0;
+ float ret_val = 0;
switch(pwm_channel_num)
{
case PWM_CHA_0: reg_base = ADV_TIMER_0_BASE; break;
@@ -156,9 +164,9 @@ uint32_t pwm_get_duty(pwm_channel_t pwm_channel_num)
case PWM_CHA_11: reg_base = ADV_TIMER_5_BASE; break;
}
if((pwm_channel_num & 0x01) == 0)
- ret_val = hal_adv_tim_get_comp_a(reg_base) * 1.0f / hal_clock_get_apb0_clk() * 1000000; //使能通道a
+ ret_val = hal_adv_tim_get_comp_a(reg_base) * 1.0f / (hal_adv_tim_get_load_value(reg_base) + 2) * 100;
else
- ret_val = hal_adv_tim_get_comp_b(reg_base) * 1.0f / hal_clock_get_apb0_clk() * 1000000; //使能通道b
+ ret_val = hal_adv_tim_get_comp_b(reg_base) * 1.0f / (hal_adv_tim_get_load_value(reg_base) + 2) * 100;
return ret_val;
}
@@ -167,9 +175,9 @@ uint32_t pwm_get_duty(pwm_channel_t pwm_channel_num)
* @brief 设置PWM频率
*
* @param pwm_channel_num 设置通道号
- * @param period 设置PWM周期，单位us，范围 0 ~ 1638us(未分频)
+ * @param freq 设置PWM周期，单位us，范围 0 ~ 1638us(未分频)
*/
-void pwm_set_freq(pwm_channel_t pwm_channel_num,uint32_t period)
+void pwm_set_freq(pwm_channel_t pwm_channel_num,uint32_t freq)
{
uint32_t reg_base = 0;
switch(pwm_channel_num)
@@ -192,40 +200,10 @@ void pwm_set_freq(pwm_channel_t pwm_channel_num,uint32_t period)
else
hal_adv_tim_b_en(reg_base,HAL_DISABLE); //失能通道b
- hal_adv_tim_set_load_value(reg_base,period * hal_clock_get_apb0_clk() / 1000000 - 1);
+ hal_adv_tim_set_load_value(reg_base,hal_clock_get_apb0_clk() * 1.0 / (hal_adv_tim_get_clock_div(reg_base) + 1) / freq - 2);
if((pwm_channel_num & 0x01) == 0)
hal_adv_tim_a_en(reg_base,HAL_ENABLE); //使能通道a
else
hal_adv_tim_b_en(reg_base,HAL_ENABLE); //使能通道b
}
-
-/**
- * @brief 获得PWM周期
- *
- * @param pwm_channel_num 设置通道号
- * @return uint32_t ，单位us
- */
-uint32_t pwm_get_freq(pwm_channel_t pwm_channel_num)
-{
- uint32_t reg_base = 0;
- uint32_t ret_val = 0;
- switch(pwm_channel_num)
- {
- case PWM_CHA_0: reg_base = ADV_TIMER_0_BASE; break;
- case PWM_CHA_1: reg_base = ADV_TIMER_0_BASE; break;
- case PWM_CHA_2: reg_base = ADV_TIMER_1_BASE; break;
- case PWM_CHA_3: reg_base = ADV_TIMER_1_BASE; break;
- case PWM_CHA_4: reg_base = ADV_TIMER_2_BASE; break;
- case PWM_CHA_5: reg_base = ADV_TIMER_2_BASE; break;
- case PWM_CHA_6: reg_base = ADV_TIMER_3_BASE; break;
- case PWM_CHA_7: reg_base = ADV_TIMER_3_BASE; break;
- case PWM_CHA_8: reg_base = ADV_TIMER_4_BASE; break;
- case PWM_CHA_9: reg_base = ADV_TIMER_4_BASE; break;
- case PWM_CHA_10: reg_base = ADV_TIMER_5_BASE; break;
- case PWM_CHA_11: reg_base = ADV_TIMER_5_BASE; break;
- }
- ret_val = hal_adv_tim_get_load_value(reg_base) * 1.0f / hal_clock_get_apb0_clk() * 1000000 + 1;
-
- return ret_val;
-}
diff --git a/project/mcu_peripheral_driver_demo/PWM/bsp/ln_drv_pwm.h b/project/mcu_peripheral_driver_demo/PWM/bsp/ln_drv_pwm.h
index 07bc4eef5f091ffa89a6b7e71790e702928b51ec..b0ac130ab3e60dfbd3be2dd35c00e3fa12b2b7c3 100644
--- a/project/mcu_peripheral_driver_demo/PWM/bsp/ln_drv_pwm.h
+++ b/project/mcu_peripheral_driver_demo/PWM/bsp/ln_drv_pwm.h
@@ -19,22 +19,26 @@
#include "hal/hal_adv_timer.h"
#include "hal/hal_gpio.h"
#include "hal/hal_clock.h"
+
typedef enum
{
PWM_CHA_0 = 0,
PWM_CHA_1 = 1,
+
PWM_CHA_2 = 2,
PWM_CHA_3 = 3,
+
PWM_CHA_4 = 4,
PWM_CHA_5 = 5,
PWM_CHA_6 = 6,
PWM_CHA_7 = 7,
+
PWM_CHA_8 = 8,
PWM_CHA_9 = 9,
+
PWM_CHA_10 = 10,
PWM_CHA_11 = 11,
-
}pwm_channel_t;
@@ -44,14 +48,11 @@ typedef enum
GPIO_B = 1,
}gpio_port_t;
-void pwm_init(uint32_t period, uint32_t duty,pwm_channel_t pwm_channel_num,gpio_port_t gpio_port,gpio_pin_t gpio_pin);
+void pwm_init(uint32_t freq, float duty,pwm_channel_t pwm_channel_num,gpio_port_t gpio_port,gpio_pin_t gpio_pin);
void pwm_start(pwm_channel_t pwm_channel_num);
-void pwm_set_duty(uint32_t duty, pwm_channel_t pwm_channel_num);
-uint32_t pwm_get_duty(pwm_channel_t pwm_channel_num);
+void pwm_set_duty(float duty, pwm_channel_t pwm_channel_num);
+float pwm_get_duty(pwm_channel_t pwm_channel_num);
void pwm_set_freq(pwm_channel_t pwm_channel_num,uint32_t period);
-uint32_t pwm_get_freq(pwm_channel_t pwm_channel_num);
-
-
#ifdef __cplusplus
}
diff --git a/project/mcu_peripheral_driver_demo/RTC/app/main.c b/project/mcu_peripheral_driver_demo/RTC/app/main.c
index cffd0c269c03c312ca23c2c42fec8bdd58ce1a35..68db072fdda8f69811ec801837928ccb9fb80adf 100644
--- a/project/mcu_peripheral_driver_demo/RTC/app/main.c
+++ b/project/mcu_peripheral_driver_demo/RTC/app/main.c
@@ -17,7 +17,7 @@
#include "ln_drv_rtc.h"
void rtc_callback(void);
-
+uint32_t running_time = 0;
int main (int argc, char* argv[])
{
@@ -27,17 +27,28 @@ int main (int argc, char* argv[])
LOG(LOG_LVL_INFO,"ln882H init! \n");
ln_show_reg_init();
- /****************** 2. RTC 测试***********************/
- rtc_init(10000,rtc_callback);
+ /****************** 2. RTC 测试,可以通过示波器测量PB5引脚来确定RTC精度***********************/
+ //设置RTC定时为1s
+ rtc_init(1000,rtc_callback);
+
+ //设置示波器测试引脚
+ gpio_init_t_def gpio_init;
+ memset(&gpio_init,0,sizeof(gpio_init)); //清零结构体
+ gpio_init.dir = GPIO_OUTPUT; //配置GPIO方向，输入或者输出
+ gpio_init.pin = GPIO_PIN_5; //配置GPIO引脚号
+ gpio_init.speed = GPIO_HIGH_SPEED; //设置GPIO速度
+ hal_gpio_init(GPIOB_BASE,&gpio_init); //初始化GPIO
while(1)
{
- LOG(LOG_LVL_INFO,"LN882H is running! \n");
+ LOG(LOG_LVL_INFO,"running time = %d:%d:%d:%d \n",running_time / 3600,running_time % 3600 / 60,running_time % 60,rtc_get_rtc_current_cnt_time());
ln_delay_ms(1000);
}
}
void rtc_callback(void)
{
- LOG(LOG_LVL_INFO,"GO IN RTC IT! \n");
+ //翻转引脚，方便示波器测量时间
+ hal_gpio_pin_toggle(GPIOB_BASE,GPIO_PIN_5);
+ running_time += 1;
}
diff --git a/project/mcu_peripheral_driver_demo/RTC/bsp/ln_drv_rtc.c b/project/mcu_peripheral_driver_demo/RTC/bsp/ln_drv_rtc.c
index 134d118da9da93b277e6411c15e087a594cece33..09367bfd264bc51d12a4bcf8a76308a2fcfe7327 100644
--- a/project/mcu_peripheral_driver_demo/RTC/bsp/ln_drv_rtc.c
+++ b/project/mcu_peripheral_driver_demo/RTC/bsp/ln_drv_rtc.c
@@ -13,16 +13,18 @@
void (*rtc_it_handler)(void);
+static uint32_t time_ms = 0; //定时时间
+
/**
* @brief 初始化RTC
*
- * @param ms 设置RTC定时时间
- * @param rtc_it_callback 设置中断回调函数
+ * @param ms 设置RTC定时时间，范围：0ms - 134217727ms
+ * @param rtc_it_callback 设置中断回调函数
*/
void rtc_init(uint32_t ms,void (*rtc_it_callback)(void))
{
//使用SleepTimer对32K的时钟进行校准,该过程可以省略，不影响使用
- hal_misc_awo_set_o_cpu_sleep_counter_bp(1);
+ hal_misc_awo_set_o_cpu_sleep_counter_bp(0);
//等待校准完成
for(int i = 0; i < 10000; i++);
@@ -30,12 +32,13 @@ void rtc_init(uint32_t ms,void (*rtc_it_callback)(void))
rtc_init_t_def rtc_init;
rtc_init.rtc_warp_en = RTC_WRAP_EN;
hal_rtc_init(RTC_BASE,&rtc_init);
- hal_rtc_set_cnt_match(RTC_BASE,(hal_misc_awo_get_i_rco32k_period_ns() * 1.0f / 32000) * 32 * ms);
+ hal_rtc_set_cnt_match(RTC_BASE,ms * 1000000.0f / hal_misc_awo_get_i_rco32k_period_ns());
hal_rtc_set_cnt_load(RTC_BASE,0);
hal_rtc_it_cfg(RTC_BASE,RTC_IT_FLAG_ACTIVE,HAL_ENABLE);
if(rtc_it_callback != NULL)
rtc_it_handler = rtc_it_callback;
+ time_ms = ms;
NVIC_SetPriority(RTC_IRQn,4);
NVIC_EnableIRQ(RTC_IRQn);
@@ -43,8 +46,25 @@ void rtc_init(uint32_t ms,void (*rtc_it_callback)(void))
hal_rtc_en(RTC_BASE,HAL_ENABLE);
}
+/**
+ * @brief 获取当前RTC计数器的时间(单位ms) 时间 = rtc_cnt * 1.0 / 32 ms
+ *
+ * @return uint32_t 返回当前RTC计数器的时间(单位ms)
+ */
+uint32_t rtc_get_rtc_current_cnt_time()
+{
+ //注：RTC计数器是向上计数的
+ return (uint32_t)(hal_rtc_get_cnt(RTC_BASE) * 1.0f / 32);
+}
+
+/**
+ * @brief RTC中断处理函数
+ *
+ */
void RTC_IRQHandler()
{
+ hal_rtc_set_cnt_match(RTC_BASE,time_ms * 1000000.0f / hal_misc_awo_get_i_rco32k_period_ns());
+ hal_misc_awo_set_o_cpu_sleep_counter_bp(0);
hal_rtc_clr_it_flag(RTC_BASE,RTC_IT_FLAG_ACTIVE);
if(rtc_it_handler != NULL)
rtc_it_handler();
diff --git a/project/mcu_peripheral_driver_demo/RTC/bsp/ln_drv_rtc.h b/project/mcu_peripheral_driver_demo/RTC/bsp/ln_drv_rtc.h
index df8aa8b636a1c3f57e7914c57062eb67593a4b66..d5898b0bd0ee3a7c694dfbe63d570a2c38f597bc 100644
--- a/project/mcu_peripheral_driver_demo/RTC/bsp/ln_drv_rtc.h
+++ b/project/mcu_peripheral_driver_demo/RTC/bsp/ln_drv_rtc.h
@@ -17,10 +17,12 @@
#endif /* __cplusplus */
#include "hal/hal_common.h"
-#include "hal_rtc.h"
#include "hal/hal_misc.h"
-void rtc_init(uint32_t ms,void (*dma_complete_it_callback)(void));
+#include "hal_rtc.h"
+
+void rtc_init(uint32_t ms,void (*rtc_it_callback)());
+uint32_t rtc_get_rtc_current_cnt_time(void);
#ifdef __cplusplus
}
diff --git a/project/mcu_peripheral_driver_demo/TIMER/app/main.c b/project/mcu_peripheral_driver_demo/TIMER/app/main.c
index a4c1d93b65f3170d1a7b76b0f88de2dcc78ce5ea..91f60f3d9592561b071be813c30925f3a0d7432d 100644
--- a/project/mcu_peripheral_driver_demo/TIMER/app/main.c
+++ b/project/mcu_peripheral_driver_demo/TIMER/app/main.c
@@ -8,6 +8,7 @@
* @copyright Copyright (c) 2021 Shanghai Lightning Semiconductor Technology Co. Ltd
*
*/
+#include "hal/hal_gpio.h"
#include "hal/hal_common.h"
#include "ln_show_reg.h"
#include "utils/debug/log.h"
@@ -18,7 +19,7 @@
void timer0_callback(void);
void timer1_callback(void);
void timer2_callback(void);
-void timer3_callback(void);
+void timer3_callback(void); //通道3在使用wifi的情况下会被wifi占用，请慎重使用
int main (int argc, char* argv[])
{
@@ -28,22 +29,32 @@ int main (int argc, char* argv[])
LOG(LOG_LVL_INFO,"ln882H init! \n");
ln_show_reg_init();
- /****************** 2. RTC 测试***********************/
- timer_init(TIMER_CH_0,500000 ,timer0_callback);
- timer_init(TIMER_CH_1,1000000,timer1_callback);
- timer_init(TIMER_CH_2,2000000,timer2_callback);
- timer_init(TIMER_CH_3,5000000,timer3_callback);
+ /****************** 2. 设置示波器测试引脚 ***********************/
+ gpio_init_t_def gpio_init;
+ memset(&gpio_init,0,sizeof(gpio_init)); //清零结构体
+ gpio_init.dir = GPIO_OUTPUT; //配置GPIO方向，输入或者输出
+ gpio_init.pin = GPIO_PIN_5; //配置GPIO引脚号
+ gpio_init.speed = GPIO_HIGH_SPEED; //设置GPIO速度
+ hal_gpio_init(GPIOB_BASE,&gpio_init); //初始化GPIO
+
+ /****************** 3. TIMER 测试***********************/
+ timer_init(TIMER_CH_0,100 ,timer0_callback); //定时100us
+ timer_init(TIMER_CH_1,1000000,timer1_callback); //定时1000000us
+ timer_init(TIMER_CH_2,2000000,timer2_callback); //定时2000000us
+ timer_init(TIMER_CH_3,5000000,timer3_callback); //定时5000000us,通道3在使用wifi的情况下会被wifi占用，请慎重使用
while(1)
{
- LOG(LOG_LVL_INFO,"LN882H is running! \n");
+ LOG(LOG_LVL_INFO,"%d\n",timer_get_timer_cnt_time(TIMER_CH_3));
ln_delay_ms(1000);
}
}
void timer0_callback()
{
- LOG(LOG_LVL_INFO,"go in timer0 interrupt! \n");
+ //翻转引脚，方便示波器测量时间
+ hal_gpio_pin_toggle(GPIOB_BASE,GPIO_PIN_5);
+ //LOG(LOG_LVL_INFO,"go in timer0 interrupt! \n");
}
void timer1_callback()
diff --git a/project/mcu_peripheral_driver_demo/TIMER/bsp/ln_drv_timer.c b/project/mcu_peripheral_driver_demo/TIMER/bsp/ln_drv_timer.c
index 9716a680ed0b8f55ab89bdde52a6ddab3c6c5b39..8b0520407672a5bd9594a61a5b6259b420bc725d 100644
--- a/project/mcu_peripheral_driver_demo/TIMER/bsp/ln_drv_timer.c
+++ b/project/mcu_peripheral_driver_demo/TIMER/bsp/ln_drv_timer.c
@@ -10,6 +10,7 @@
*/
#include "ln_drv_timer.h"
+#include "hal/hal_clock.h"
void (*timer0_it_handler)(void);
void (*timer1_it_handler)(void);
@@ -20,7 +21,7 @@ void (*timer3_it_handler)(void);
* @brief 定时器初始化
*
* @param timer_ch 选择定时器通道
- * @param us 0 ~ 0xFFFFFF us
+ * @param us 0 ~ 16777215 us
* @param timer_it_callback 定时器中断回调函数
*/
void timer_init(timer_ch_t timer_ch,uint32_t us,void (*timer_it_callback)(void))
@@ -37,12 +38,15 @@ void timer_init(timer_ch_t timer_ch,uint32_t us,void (*timer_it_callback)(void))
//Timer初始化
tim_init_t_def tim_init;
memset(&tim_init,0,sizeof(tim_init));
-
- tim_init.tim_load_value = us - 1; //设置加载值，定时时间 = 1 / 80000000 * 80000 = 1ms
tim_init.tim_mode = TIM_USER_DEF_CNT_MODE; //设置定时器模式，设置为用户定义模式
-
- tim_init.tim_div = 40 - 1;
-
+
+ if(us < 1000){
+ tim_init.tim_div = 0;
+ tim_init.tim_load_value = us * (uint32_t)(hal_clock_get_apb0_clk() / 1000000) - 1;
+ }else{
+ tim_init.tim_div = (uint32_t)(hal_clock_get_apb0_clk() / 1000000) - 1;
+ tim_init.tim_load_value = us - 1;
+ }
hal_tim_init(timer_base,&tim_init); //初始化定时器
hal_tim_en(timer_base,HAL_ENABLE); //使能定时器模块
hal_tim_it_cfg(timer_base,TIM_IT_FLAG_ACTIVE,HAL_ENABLE); //配置中断
@@ -82,11 +86,31 @@ void timer_init(timer_ch_t timer_ch,uint32_t us,void (*timer_it_callback)(void))
break;
}
}
-
-
}
+/**
+ * @brief 获取当前定时器中计数器的运行时间，单位us
+ *
+ * @param timer_ch 选择定时器通道
+ * @return uint32_t 返回当前定时器中计数器的运行时间，单位us
+ */
+uint32_t timer_get_timer_cnt_time(timer_ch_t timer_ch)
+{
+ uint32_t timer_base = 0;
+ switch(timer_ch)
+ {
+ case TIMER_CH_0: timer_base = TIMER0_BASE; break;
+ case TIMER_CH_1: timer_base = TIMER1_BASE; break;
+ case TIMER_CH_2: timer_base = TIMER2_BASE; break;
+ case TIMER_CH_3: timer_base = TIMER3_BASE; break;
+ }
+ return (uint32_t)((hal_tim_get_load_value(timer_base) - hal_tim_get_current_cnt_value(timer_base))
+ / ((hal_clock_get_apb0_clk() / 1000000) * 1.0f / ((hal_tim_get_div(timer_base) + 1))));
+}
+/**
+ * @brief TIMER0中断处理函数
+ */
void TIMER0_IRQHandler()
{
if(hal_tim_get_it_flag(TIMER0_BASE,TIM_IT_FLAG_ACTIVE))
@@ -97,6 +121,9 @@ void TIMER0_IRQHandler()
}
}
+/**
+ * @brief TIMER1中断处理函数
+ */
void TIMER1_IRQHandler()
{
if(hal_tim_get_it_flag(TIMER1_BASE,TIM_IT_FLAG_ACTIVE))
@@ -107,6 +134,9 @@ void TIMER1_IRQHandler()
}
}
+/**
+ * @brief TIMER2中断处理函数
+ */
void TIMER2_IRQHandler()
{
if(hal_tim_get_it_flag(TIMER2_BASE,TIM_IT_FLAG_ACTIVE))
@@ -117,6 +147,9 @@ void TIMER2_IRQHandler()
}
}
+/**
+ * @brief TIMER3中断处理函数
+ */
void TIMER3_IRQHandler()
{
if(hal_tim_get_it_flag(TIMER3_BASE,TIM_IT_FLAG_ACTIVE))
@@ -125,4 +158,4 @@ void TIMER3_IRQHandler()
if(timer3_it_handler != NULL)
timer3_it_handler();
}
-}
\ No newline at end of file
+}
diff --git a/project/mcu_peripheral_driver_demo/TIMER/bsp/ln_drv_timer.h b/project/mcu_peripheral_driver_demo/TIMER/bsp/ln_drv_timer.h
index a0c615ba00bf5ce96301f2f7624997010a8662ea..a4c720926699c9b672e309b96db2dc293811827c 100644
--- a/project/mcu_peripheral_driver_demo/TIMER/bsp/ln_drv_timer.h
+++ b/project/mcu_peripheral_driver_demo/TIMER/bsp/ln_drv_timer.h
@@ -25,10 +25,11 @@ typedef enum
TIMER_CH_0,
TIMER_CH_1,
TIMER_CH_2,
- TIMER_CH_3,
+ TIMER_CH_3, //ͨ3ʹwifi»ᱻwifiռãʹ
}timer_ch_t;
-void timer_init(timer_ch_t timer_ch,uint32_t us,void (*timer_it_callback)(void));
+void timer_init(timer_ch_t timer_ch,uint32_t us,void (*timer_it_callback)(void));
+uint32_t timer_get_timer_cnt_time(timer_ch_t timer_ch);
#ifdef __cplusplus
}
diff --git a/project/mcu_peripheral_driver_demo/UART/app/main.c b/project/mcu_peripheral_driver_demo/UART/app/main.c
index 41286c4ef538e745a17ff1f94ef5c772958fe8bc..b7609632cb39c5331acf900ff9d36a9c874b29bf 100644
--- a/project/mcu_peripheral_driver_demo/UART/app/main.c
+++ b/project/mcu_peripheral_driver_demo/UART/app/main.c
@@ -15,13 +15,13 @@
#include "ln_drv_uart.h"
-void uart0_callback(uint32_t cur_len);
-void uart1_callback(uint32_t cur_len);
-void uart2_callback(uint32_t cur_len);
-
-uint8_t send_data[100] = "UART TEST";
-uint8_t recv_data[100];
+void uart0_recv_callback(void);
+void uart1_recv_callback(void);
+void uart2_recv_callback(void);
+char send_data[100] = "UART TEST";
+char recv_data[100];
+uint32_t recv_cnt = 0;
int main (int argc, char* argv[])
{
/****************** 1. 系统初始化 ***********************/
@@ -29,8 +29,6 @@ int main (int argc, char* argv[])
ln_show_reg_init();
/****************** 2. UART 测试***********************/
- void uart_init(uart_x_t uart_x,uart_pin_cfg_t *uart_pin_cfg,uint32_t baud_rate,void (*uart_it_callback)(uint32_t));
-
uart_pin_cfg_t uart_pin_cfg;
memset(&uart_pin_cfg,0,sizeof(uart_pin_cfg_t));
@@ -39,41 +37,32 @@ int main (int argc, char* argv[])
uart_pin_cfg.uart_rx_port = GPIO_B;
uart_pin_cfg.uart_rx_pin = GPIO_PIN_8;
- uart_init(UART_0,&uart_pin_cfg,115200,uart0_callback);
-
- uart_recv_data(UART_0,recv_data,100);
- uart_send_data(UART_0,send_data,9);
-
+ uart_init(UART_0,&uart_pin_cfg,115200,uart0_recv_callback);
+
while(1)
{
+ for(int i = 0; i < strlen(send_data); i ++){
+ while(uart_get_tx_empty_flag(UART_0) != HAL_SET);
+ uart_send_data(UART_0,send_data[i]);
+ }
ln_delay_ms(1000);
}
}
-void uart0_callback(uint32_t cur_len)
+void uart0_recv_callback(void)
{
- if(cur_len == 8)
- {
- uart_send_data(UART_0,recv_data,8);
- uart_recv_data(UART_0,recv_data,100);
+ if(uart_get_rx_not_empty_flag(UART_0) == HAL_SET){
+ recv_data[recv_cnt++] = uart_recv_data(UART_0);
}
}
-void uart1_callback(uint32_t cur_len)
+void uart1_recv_callback(void)
{
- if(cur_len == 8)
- {
- uart_send_data(UART_1,recv_data,8);
- uart_recv_data(UART_1,recv_data,100);
- }
+
}
-void uart2_callback(uint32_t cur_len)
+void uart2_recv_callback(void)
{
- if(cur_len == 8)
- {
- uart_send_data(UART_2,recv_data,8);
- uart_recv_data(UART_2,recv_data,100);
- }
+
}
diff --git a/project/mcu_peripheral_driver_demo/UART/bsp/ln_drv_uart.c b/project/mcu_peripheral_driver_demo/UART/bsp/ln_drv_uart.c
index 6cfed0758174b18bf62a2807349b640a6b311e42..3c7b51ab5e520556020416ac1d81d9d0d52b8214 100644
--- a/project/mcu_peripheral_driver_demo/UART/bsp/ln_drv_uart.c
+++ b/project/mcu_peripheral_driver_demo/UART/bsp/ln_drv_uart.c
@@ -11,22 +11,9 @@
#include "ln_drv_uart.h"
-void (*uart0_it_handler)(uint32_t cur_len);
-void (*uart1_it_handler)(uint32_t cur_len);
-void (*uart2_it_handler)(uint32_t cur_len);
-
-uint8_t *uart0_recv_data = NULL;
-uint8_t *uart1_recv_data = NULL;
-uint8_t *uart2_recv_data = NULL;
-
-uint32_t uart0_recv_len = 0;
-uint32_t uart1_recv_len = 0;
-uint32_t uart2_recv_len = 0;
-
-
-uint32_t uart0_recv_pos = 0;
-uint32_t uart1_recv_pos = 0;
-uint32_t uart2_recv_pos = 0;
+void (*uart0_recv_it_handler)(void);
+void (*uart1_recv_it_handler)(void);
+void (*uart2_recv_it_handler)(void);
/**
* @brief UART 初始化
@@ -36,7 +23,7 @@ uint32_t uart2_recv_pos = 0;
* @param baud_rate 设置UART波特率
* @param uart_it_callback 设置UART接收中断回调函数
*/
-void uart_init(uart_x_t uart_x,uart_pin_cfg_t *uart_pin_cfg,uint32_t baud_rate,void (*uart_it_callback)(uint32_t))
+void uart_init(uart_x_t uart_x,uart_pin_cfg_t *uart_pin_cfg,uint32_t baud_rate,void (*uart_recv_it_callback)(void))
{
uint32_t uart_base = 0;
uint32_t gpio_base = 0;
@@ -102,17 +89,16 @@ void uart_init(uart_x_t uart_x,uart_pin_cfg_t *uart_pin_cfg,uint32_t baud_rate,v
hal_uart_tx_mode_en(uart_base,HAL_ENABLE); //使能接收模式
hal_uart_en(uart_base,HAL_ENABLE); //使能UART模块
- NVIC_SetPriority((IRQn_Type)(UART0_IRQn + uart_x), 4);
+ NVIC_SetPriority((IRQn_Type)(UART0_IRQn + uart_x), 4);
NVIC_EnableIRQ((IRQn_Type)(UART0_IRQn + uart_x));
hal_uart_it_en(uart_base,USART_IT_RXNE); //使能接收中断
switch(uart_x)
{
- case UART_0: if(uart_it_callback != NULL) uart0_it_handler = uart_it_callback; break;
- case UART_1: if(uart_it_callback != NULL) uart1_it_handler = uart_it_callback; break;
- case UART_2: if(uart_it_callback != NULL) uart2_it_handler = uart_it_callback; break;
+ case UART_0: if(uart_recv_it_callback != NULL) uart0_recv_it_handler = uart_recv_it_callback; break;
+ case UART_1: if(uart_recv_it_callback != NULL) uart1_recv_it_handler = uart_recv_it_callback; break;
+ case UART_2: if(uart_recv_it_callback != NULL) uart2_recv_it_handler = uart_recv_it_callback; break;
}
-
}
/**
@@ -120,9 +106,8 @@ void uart_init(uart_x_t uart_x,uart_pin_cfg_t *uart_pin_cfg,uint32_t baud_rate,v
*
* @param uart_x 选择UART通道
* @param data 设置发送指针
- * @param len 设置要发送的数据长度
*/
-void uart_send_data(uart_x_t uart_x,uint8_t *data,uint32_t len)
+void uart_send_data(uart_x_t uart_x,uint8_t data)
{
uint32_t uart_base = 0;
switch(uart_x)
@@ -131,105 +116,94 @@ void uart_send_data(uart_x_t uart_x,uint8_t *data,uint32_t len)
case UART_1: uart_base = UART1_BASE; break;
case UART_2: uart_base = UART2_BASE; break;
}
+ hal_uart_send_data(uart_base,data);
+}
- for(int i = 0; i < len; i++)
+/**
+ * @brief 设置UART接收指针
+ *
+ * @param uart_x 选择UART通道
+ */
+uint16_t uart_recv_data(uart_x_t uart_x)
+{
+ uint32_t uart_base = 0;
+ switch(uart_x)
{
- while(hal_uart_flag_get(uart_base,USART_FLAG_TXE) != HAL_SET);
- hal_uart_send_data(uart_base,data[i]);
+ case UART_0: uart_base = UART0_BASE; break;
+ case UART_1: uart_base = UART1_BASE; break;
+ case UART_2: uart_base = UART2_BASE; break;
}
+ return hal_uart_recv_data(uart_base);
}
/**
- * @brief 设置UART接收指针
+ * @brief 获取UART RX缓冲区非空标志位
*
- * @param uart_x 选择UART通道
- * @param data 设置接收指针
- * @param len 设置指针的最大长度
+ * @param uart_x
+ * @return uint8_t
*/
-void uart_recv_data(uart_x_t uart_x,uint8_t *data,uint32_t len)
+uint8_t uart_get_rx_not_empty_flag(uart_x_t uart_x)
{
+ uint32_t uart_base = 0;
switch(uart_x)
{
- case UART_0: uart0_recv_data = data; uart0_recv_len = len; uart0_recv_pos = 0; break;
- case UART_1: uart1_recv_data = data; uart1_recv_len = len; uart1_recv_pos = 0; break;
- case UART_2: uart2_recv_data = data; uart2_recv_len = len; uart2_recv_pos = 0; break;
+ case UART_0: uart_base = UART0_BASE; break;
+ case UART_1: uart_base = UART1_BASE; break;
+ case UART_2: uart_base = UART2_BASE; break;
}
+ return hal_uart_flag_get(uart_base,USART_FLAG_RXNE);
}
+/**
+ * @brief 获取UART TX缓冲区为空标志位
+ *
+ * @param uart_x
+ * @return uint8_t
+ */
+uint8_t uart_get_tx_empty_flag(uart_x_t uart_x)
+{
+ uint32_t uart_base = 0;
+ switch(uart_x)
+ {
+ case UART_0: uart_base = UART0_BASE; break;
+ case UART_1: uart_base = UART1_BASE; break;
+ case UART_2: uart_base = UART2_BASE; break;
+ }
+ return hal_uart_flag_get(uart_base,USART_FLAG_TXE);
+}
+/**
+ * @brief UART0中断服务函数
+ */
void UART0_IRQHandler()
{
if(hal_uart_flag_get(UART0_BASE,USART_FLAG_RXNE) && hal_uart_it_en_status_get(UART0_BASE,USART_IT_RXNE))
{
- if(uart0_recv_pos >= uart0_recv_len)
- {
- hal_uart_recv_data(UART0_BASE);
- }
- else
- {
- if(uart0_recv_data != NULL)
- {
- uart0_recv_data[uart0_recv_pos++] = hal_uart_recv_data(UART0_BASE);
- }
- else
- {
- hal_uart_recv_data(UART0_BASE);
- }
- }
- if(uart0_it_handler != NULL)
- uart0_it_handler(uart0_recv_pos);
- }
- if(hal_uart_flag_get(UART0_BASE,USART_FLAG_NOISE))
- {
-
+ if(uart0_recv_it_handler != NULL)
+ uart0_recv_it_handler();
}
-
}
+/**
+ * @brief UART1中断服务函数
+ */
void UART1_IRQHandler()
{
if(hal_uart_flag_get(UART1_BASE,USART_FLAG_RXNE) && hal_uart_it_en_status_get(UART1_BASE,USART_IT_RXNE))
{
- if(uart1_recv_pos >= uart1_recv_len)
- {
- hal_uart_recv_data(UART1_BASE);
- }
- else
- {
- if(uart1_recv_data != NULL)
- {
- uart1_recv_data[uart1_recv_pos++] = hal_uart_recv_data(UART1_BASE);
- }
- else
- {
- hal_uart_recv_data(UART1_BASE);
- }
- }
- if(uart1_it_handler != NULL)
- uart1_it_handler(uart1_recv_pos);
+ if(uart1_recv_it_handler != NULL)
+ uart1_recv_it_handler();
}
}
+/**
+ * @brief UART2中断服务函数
+ */
void UART2_IRQHandler()
{
if(hal_uart_flag_get(UART2_BASE,USART_FLAG_RXNE) && hal_uart_it_en_status_get(UART2_BASE,USART_IT_RXNE))
{
- if(uart2_recv_pos >= uart2_recv_len)
- {
- hal_uart_recv_data(UART2_BASE);
- }
- else
- {
- if(uart2_recv_data != NULL)
- {
- uart2_recv_data[uart2_recv_pos++] = hal_uart_recv_data(UART2_BASE);
- }
- else
- {
- hal_uart_recv_data(UART2_BASE);
- }
- }
- if(uart2_it_handler != NULL)
- uart2_it_handler(uart2_recv_pos);
+ if(uart2_recv_it_handler != NULL)
+ uart2_recv_it_handler();
}
}
diff --git a/project/mcu_peripheral_driver_demo/UART/bsp/ln_drv_uart.h b/project/mcu_peripheral_driver_demo/UART/bsp/ln_drv_uart.h
index 53b1c17b26536fb6433e4060d997d6860ee765d0..34833754885db12e51300da6d2f8416c50b9195d 100644
--- a/project/mcu_peripheral_driver_demo/UART/bsp/ln_drv_uart.h
+++ b/project/mcu_peripheral_driver_demo/UART/bsp/ln_drv_uart.h
@@ -43,9 +43,11 @@ typedef struct
gpio_pin_t uart_rx_pin;
}uart_pin_cfg_t;
-void uart_init(uart_x_t uart_x,uart_pin_cfg_t *uart_pin_cfg,uint32_t baud_rate,void (*uart_it_callback)(uint32_t));
-void uart_send_data(uart_x_t uart_x,uint8_t *data,uint32_t len);
-void uart_recv_data(uart_x_t uart_x,uint8_t *data,uint32_t len);
+void uart_init(uart_x_t uart_x,uart_pin_cfg_t *uart_pin_cfg,uint32_t baud_rate,void (*uart_it_callback)(void));
+void uart_send_data(uart_x_t uart_x,uint8_t data);
+uint16_t uart_recv_data(uart_x_t uart_x);
+uint8_t uart_get_rx_not_empty_flag(uart_x_t uart_x);
+uint8_t uart_get_tx_empty_flag(uart_x_t uart_x);
#ifdef __cplusplus
}
diff --git a/project/mcu_peripheral_driver_demo/UART_DMA/app/main.c b/project/mcu_peripheral_driver_demo/UART_DMA/app/main.c
index f8805d4229131432712466119518d0b12a77627b..9679b6fa866f2aadcc035ed8ceebb722be469e2f 100644
--- a/project/mcu_peripheral_driver_demo/UART_DMA/app/main.c
+++ b/project/mcu_peripheral_driver_demo/UART_DMA/app/main.c
@@ -36,11 +36,6 @@ int main (int argc, char* argv[])
uart_pin_cfg.uart_rx_port = GPIO_B;
uart_pin_cfg.uart_rx_pin = GPIO_PIN_8;
-// uart_init(UART_0,&uart_pin_cfg,115200,uart0_callback);
-//
-// uart_recv_data(UART_0,recv_data,100);
-// uart_send_data(UART_0,send_data,9);
-
uart_dma_init(UART_0,&uart_pin_cfg,115200,uart_dma_recv_callback,uart_dma_send_callback);
uart_dma_recv_data(recv_data,10);
uart_dma_send_data(send_data,9);
|