From 576760666aaf577050e8365b1421426a62447b6c Mon Sep 17 00:00:00 2001 From: Jacky6 Date: Fri, 1 Dec 2023 06:57:32 +0800 Subject: [PATCH] =?UTF-8?q?fix:=20=E4=BF=AE=E6=AD=A3=E8=AE=BE=E7=BD=AEDMA?= =?UTF-8?q?=E8=A7=A6=E5=8F=91=E6=BA=90=E7=9A=84=E6=96=B9=E5=BC=8F?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- Libraries/AIR001xx_HAL_Driver/Src/air001xx_hal.c | 2 +- .../Src/main.c | 2 +- .../ADC_SingleConversion_TriggerTimer_DMA/Src/main.c | 2 +- .../Example_HAL/AIR001xx_HAL_Driver/Src/air001xx_hal.c | 2 +- .../Example_LL/AIR001xx_HAL_Driver/Src/air001xx_hal.c | 2 +- .../Example_LL/USART_HyperTerminal_DMA_Init/Src/main.c | 6 ++++-- 6 files changed, 9 insertions(+), 7 deletions(-) diff --git a/Libraries/AIR001xx_HAL_Driver/Src/air001xx_hal.c b/Libraries/AIR001xx_HAL_Driver/Src/air001xx_hal.c index 96a2d45..533e898 100644 --- a/Libraries/AIR001xx_HAL_Driver/Src/air001xx_hal.c +++ b/Libraries/AIR001xx_HAL_Driver/Src/air001xx_hal.c @@ -535,7 +535,7 @@ void HAL_SYSCFG_DMA_Req(uint32_t Requset) { /* Check the parameter */ - SET_BIT(SYSCFG->CFGR3, Requset); + WRITE_REG(SYSCFG->CFGR3, Requset); } #endif diff --git a/ModuleDemo/ADC/Example_LL/ADC_MultiChannelSingleConversion_TriggerSW_DMA/Src/main.c b/ModuleDemo/ADC/Example_LL/ADC_MultiChannelSingleConversion_TriggerSW_DMA/Src/main.c index 46a4931..f4aa2df 100644 --- a/ModuleDemo/ADC/Example_LL/ADC_MultiChannelSingleConversion_TriggerSW_DMA/Src/main.c +++ b/ModuleDemo/ADC/Example_LL/ADC_MultiChannelSingleConversion_TriggerSW_DMA/Src/main.c @@ -227,7 +227,7 @@ static void APP_DmaConfig() LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_SYSCFG); /* ADC对应通道LL_DMA_CHANNEL_1 */ - SET_BIT(SYSCFG->CFGR3, 0x0); + LL_SYSCFG_SetDMARemap_CH1(LL_SYSCFG_DMA_MAP_ADC); /* 配置DMA传输方向为外设到存储器 */ LL_DMA_SetDataTransferDirection(DMA1, LL_DMA_CHANNEL_1, LL_DMA_DIRECTION_PERIPH_TO_MEMORY); diff --git a/ModuleDemo/ADC/Example_LL/ADC_SingleConversion_TriggerTimer_DMA/Src/main.c b/ModuleDemo/ADC/Example_LL/ADC_SingleConversion_TriggerTimer_DMA/Src/main.c index bbfa594..f361ea4 100644 --- a/ModuleDemo/ADC/Example_LL/ADC_SingleConversion_TriggerTimer_DMA/Src/main.c +++ b/ModuleDemo/ADC/Example_LL/ADC_SingleConversion_TriggerTimer_DMA/Src/main.c @@ -250,7 +250,7 @@ static void APP_DmaConfig(void) LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_SYSCFG); /* ADC对应通道LL_DMA_CHANNEL_1 */ - SET_BIT(SYSCFG->CFGR3, 0x0); + LL_SYSCFG_SetDMARemap_CH1(LL_SYSCFG_DMA_MAP_ADC); /* 配置DMA传输方向为外设到存储器 */ LL_DMA_SetDataTransferDirection(DMA1, LL_DMA_CHANNEL_1, LL_DMA_DIRECTION_PERIPH_TO_MEMORY); diff --git a/ModuleDemo/Templates/Example_HAL/AIR001xx_HAL_Driver/Src/air001xx_hal.c b/ModuleDemo/Templates/Example_HAL/AIR001xx_HAL_Driver/Src/air001xx_hal.c index 96a2d45..533e898 100644 --- a/ModuleDemo/Templates/Example_HAL/AIR001xx_HAL_Driver/Src/air001xx_hal.c +++ b/ModuleDemo/Templates/Example_HAL/AIR001xx_HAL_Driver/Src/air001xx_hal.c @@ -535,7 +535,7 @@ void HAL_SYSCFG_DMA_Req(uint32_t Requset) { /* Check the parameter */ - SET_BIT(SYSCFG->CFGR3, Requset); + WRITE_REG(SYSCFG->CFGR3, Requset); } #endif diff --git a/ModuleDemo/Templates/Example_LL/AIR001xx_HAL_Driver/Src/air001xx_hal.c b/ModuleDemo/Templates/Example_LL/AIR001xx_HAL_Driver/Src/air001xx_hal.c index 96a2d45..533e898 100644 --- a/ModuleDemo/Templates/Example_LL/AIR001xx_HAL_Driver/Src/air001xx_hal.c +++ b/ModuleDemo/Templates/Example_LL/AIR001xx_HAL_Driver/Src/air001xx_hal.c @@ -535,7 +535,7 @@ void HAL_SYSCFG_DMA_Req(uint32_t Requset) { /* Check the parameter */ - SET_BIT(SYSCFG->CFGR3, Requset); + WRITE_REG(SYSCFG->CFGR3, Requset); } #endif diff --git a/ModuleDemo/USART/Example_LL/USART_HyperTerminal_DMA_Init/Src/main.c b/ModuleDemo/USART/Example_LL/USART_HyperTerminal_DMA_Init/Src/main.c index eb13ca1..28d36db 100644 --- a/ModuleDemo/USART/Example_LL/USART_HyperTerminal_DMA_Init/Src/main.c +++ b/ModuleDemo/USART/Example_LL/USART_HyperTerminal_DMA_Init/Src/main.c @@ -249,12 +249,14 @@ static void APP_ConfigDma(USART_TypeDef *USARTx) if (USARTx == USART1) { /* USART1_TX对应通道LL_DMA_CHANNEL_1，USART1_RX对应通道LL_DMA_CHANNEL_2*/ - SET_BIT(SYSCFG->CFGR3, 0x0605); + LL_SYSCFG_SetDMARemap_CH1(LL_SYSCFG_DMA_MAP_USART1_TX); + LL_SYSCFG_SetDMARemap_CH2(LL_SYSCFG_DMA_MAP_USART1_RX); } else { /*USART2_TX对应通道LL_DMA_CHANNEL_1，USART2_RX对应通道LL_DMA_CHANNEL_2*/ - SET_BIT(SYSCFG->CFGR3, 0x0807); + LL_SYSCFG_SetDMARemap_CH1(LL_SYSCFG_DMA_MAP_USART2_TX); + LL_SYSCFG_SetDMARemap_CH2(LL_SYSCFG_DMA_MAP_USART2_RX); } /*设置中断优先级*/ -- Gitee