From ca393185defa72d08723d0c189f719598804f54e Mon Sep 17 00:00:00 2001 From: wangguokun Date: Wed, 13 Nov 2024 14:10:21 +0800 Subject: [PATCH] plat/d9: refactor the static page table Signed-off-by: wangguokun --- Linker.uk | 19 +++- Makefile.uk | 3 +- d9_bpt64.S | 115 ----------------------- d9_mrds.c | 204 +++++++++++++++++++++++++++++++++++++++++ start.S | 1 - static_memregion.lds.S | 12 +++ 6 files changed, 235 insertions(+), 119 deletions(-) delete mode 100644 d9_bpt64.S create mode 100644 d9_mrds.c create mode 100644 static_memregion.lds.S diff --git a/Linker.uk b/Linker.uk index f2afd45..79f7b6e 100644 --- a/Linker.uk +++ b/Linker.uk @@ -9,21 +9,34 @@ endif ## D9_IMAGE := $(BUILD_DIR)/$(CONFIG_UK_NAME)_d9-$(CONFIG_UK_ARCH) D9_DEBUG_IMAGE := $(D9_IMAGE).dbg +D9_STATIC_PT := $(BUILD_DIR)/tn_static_pgtable +ifeq ($(CONFIG_STATIC_PGTABLE),y) +D9_STATIC_PT_OBLIB := $(D9_STATIC_PT).o +else +D9_STATIC_PT_OBLIB := +endif D9_LD_SCRIPT_FLAGS := $(addprefix -Wl$(comma)-dT$(comma),\ $(UK_PLAT_D9_DEF_LDS)) D9_LD_SCRIPT_FLAGS += $(addprefix -Wl$(comma)-T$(comma),\ $(D9_LD_SCRIPT-y) $(EXTRA_LD_SCRIPT-y)) +ifeq ($(CONFIG_STATIC_PGTABLE),y) +$(D9_STATIC_PT_OBLIB): $(D9_OLIBS-y) $(STATIC_PAGE_TOOLS) + $(call build_static_pgtable,$(word 1, $<),$(D9_STATIC_PT)) +endif + $(D9_DEBUG_IMAGE): $(D9_ALIBS) $(D9_ALIBS-y) $(D9_OLIBS) $(D9_OLIBS-y) \ $(UK_ALIBS) $(UK_ALIBS-y) $(UK_OLIBS) $(UK_OLIBS-y) \ $(D9_LD_SCRIPT-y) $(EXTRA_LD_SCRIPT-y) \ - $(UK_PLAT_D9_DEF_LDS) $(UK_LDEPS) + $(UK_PLAT_D9_DEF_LDS) $(UK_LDEPS) \ + $(D9_STATIC_PT_OBLIB) $(call build_cmd,LD,,$@,\ $(LD) \ $(D9_LDFLAGS) $(D9_LDFLAGS-y) \ $(D9_OLIBS) $(D9_OLIBS-y) \ $(UK_OLIBS) $(UK_OLIBS-y) \ + $(D9_STATIC_PT_OBLIB) \ -Wl$(comma)--start-group \ $(D9_ALIBS) $(D9_ALIBS-y) \ $(UK_ALIBS) $(UK_ALIBS-y) \ @@ -35,7 +48,9 @@ $(D9_DEBUG_IMAGE): $(D9_ALIBS) $(D9_ALIBS-y) $(D9_OLIBS) $(D9_OLIBS-y) \ ifeq ($(CONFIG_OPTIMIZE_PIE),y) $(call build_uk_reloc,$@) endif - +ifeq ($(CONFIG_STATIC_PGTABLE),y) + $(call update_static_pgtable,$@,$(D9_STATIC_PT)) +endif $(D9_IMAGE): $(D9_IMAGE).dbg $(call build_cmd,SCSTRIP,,$@,\ diff --git a/Makefile.uk b/Makefile.uk index 5308477..f258c65 100644 --- a/Makefile.uk +++ b/Makefile.uk @@ -63,6 +63,7 @@ LIBD9PLAT_SRCS-y += $(LIBD9PLAT_BASE)/memory.c LIBD9PLAT_SRCS-y += $(LIBD9PLAT_BASE)/setup.c LIBD9PLAT_SRCS-y += $(LIBD9PLAT_BASE)/shutdown.c LIBD9PLAT_SRCS-$(CONFIG_ARCH_ARM_64) += $(LIBD9PLAT_BASE)/mmu.S|isr -LIBD9PLAT_SRCS-$(CONFIG_ARCH_ARM_64) += $(LIBD9PLAT_BASE)/d9_bpt64.S|arm +LIBD9PLAT_SRCS-$(CONFIG_STATIC_PGTABLE) += $(LIBD9PLAT_BASE)/static_memregion.lds.S|arm +LIBD9PLAT_SRCS-$(CONFIG_ARCH_ARM_64) += $(LIBD9PLAT_BASE)/d9_mrds.c LIBD9PLAT_SRCS-y += $(UK_PLAT_D9_DEF_LDS) diff --git a/d9_bpt64.S b/d9_bpt64.S deleted file mode 100644 index ed49b92..0000000 --- a/d9_bpt64.S +++ /dev/null @@ -1,115 +0,0 @@ -/* SPDX-License-Identifier: Apache-2.0 - * Copyright 2024 The TenonOS Authors - */ - -#include - -#include -#include - -/* ------------------------- Memory Map of myd-jd9x ----------------------- - * - * 0x0000,0000,0000 - 0x0000,3FFF,FFFF Device: attr:device - * 0x0000,4000,0000 - 0x0000,FFFF,FFFF Normal Mem: 1-4GB attr:normal - * 0x0001,0000,0000 - 0x0004,3FFF,FFFF Normal Mem: 4GB-17GB attr:normal - * 0x0005,0000,0000 - 0x0006,FFFF,FFFF PCIe_MAPPED_IO attr:device - * Notice: The page tables below use the Unikraft indexing convention. - */ - -.section .data -.align 4 -.global bpt_unmap_mrd -bpt_unmap_mrd: - .quad 0x0000000040000000 /* 1GB */ - .quad 0x0000000040000000 /* 1GB */ - /* Used for struct ukplat_memregion_desc - * Unmapping starts at 1GB and ends at 4GB - */ - .quad 0x00000000c0000000 - .short 0x0000000000000000 - .short 0x0000000000000010 /* UKPLAT_MEMRF_UNMAP */ - .space 36 - -.global arm64_bpt_l3_pt0 - -/* L3: 0 - 256TiB (512Gib / entry) - * - * 0x0000 0000 0000 0000 - 0x0000 007f ffff ffff Table descriptor to l2_pt0 - * 0x0000 0080 0000 0000 - 0x0000 00ff ffff ffff Hole - * 0x0000 ff80 0000 0000 - 0x0000 ffff ffff ffff Table descriptor to l2_pt511 - */ -.align 12 -arm64_bpt_l3_pt0: - ur_pte arm64_bpt_l2_pt0, PTE_TYPE_TABLE - pte_zero ,510 -#if CONFIG_PAGING - ur_pte arm64_bpt_l2_pt511, PTE_TYPE_TABLE -#else /* !CONFIG_PAGING */ - pte_zero ,1 -#endif /* !CONFIG_PAGING */ - -/* L2: 0 - 512Gib (1GiB / entry) - * 0x0000 0000 0000 0000 - 0x0000 0000 3FFF FFFF Table descriptor to l1_pt0 - * 0x0000 0000 4000 0000 - 0x0000 0000 7FFF FFFF Table descriptor to l1_pt1 - * 0x0000 0000 8000 0000 - 0x0000 0000 BFFF FFFF NORMAL RAM - * 0x0000 0000 C000 0000 - 0x0000 0000 FFFF FFFF Hole - * 0x0000 0001 0000 0000 - 0x0000 0004 3FFF FFFF DEVICE DDR_MEM_AP_ONLY - * 0x0000 0004 4000 0000 - 0x0000 0004 FFFF FFFF Hole - * 0x0000 0005 0000 0000 - 0x0000 0006 FFFF FFFF DEVICE PCIE_MAPPED_IO - * 0x0000 0007 0000 0000 - 0x0000 0080 0000 0000 Hole - */ -.align 12 -arm64_bpt_l2_pt0: - ur_pte arm64_bpt_l1_pt0, PTE_TYPE_TABLE - ur_pte arm64_bpt_l1_pt1, PTE_TYPE_TABLE - pte_fill 0x80000000, 1, 2, PTE_BLOCK_NORMAL_RWX - pte_zero ,1 - pte_fill 0x100000000, 13, 2, PTE_BLOCK_DEVICE_nGnRnE - pte_zero ,3 - pte_fill 0x500000000, 8, 2, PTE_BLOCK_DEVICE_nGnRnE - pte_zero ,484 - -/* L1: 0 - 1GiB (2MiB / entry) - * 0x0000 0000 0000 0000 - 0x0000 0000 3FFF FFFF DEVICE - */ -.align 12 -arm64_bpt_l1_pt0: - pte_fill 0x00000000, 512, 1, PTE_BLOCK_DEVICE_nGnRnE - -/* L1: 1GiB - 2Gib (2MiB / entry) - * 0x0000 0000 4000 0000 - 0x0000 0000 40A0 0000 Hole - * 0x0000 0000 40A0 0000 - 0x0000 0000 40BF FFFF Table descriptor to l0_pt5 - * 0x0000 0000 40C0 0000 - 0x0000 0000 459F FFFF NORMAL RAM - * 0x0000 0000 45A0 0000 - 0x0000 0000 571F FFFF Hole - * 0x0000 0000 5720 0000 - 0x0000 0000 771F FFFF NORMAL RAM - * 0x0000 0000 7720 0000 - 0x0000 0000 7c5F FFFF Hole - * 0x0000 0000 7C60 0000 - 0x0000 0000 7FFF FFFF NORMAL RAM - */ -.align 12 -arm64_bpt_l1_pt1: - pte_zero ,5 - ur_pte arm64_bpt_l0_pt5, PTE_TYPE_TABLE - pte_fill 0x40c00000, 40, 1, PTE_BLOCK_NORMAL_RWX - pte_zero ,139 - pte_fill 0x57200000, 256, 1, PTE_BLOCK_NORMAL_RWX - pte_zero ,42 - pte_fill 0x7C600000, 29, 1, PTE_BLOCK_NORMAL_RWX - -/* L0: (2MiB / entry) - * 0x0000 0000 40A0 0000 - 0x0000 0000 40A0 3FFF Hole - * 0x0000 0000 40A0 4000 - 0x0000 0000 40C0 0000 NORMAL RAM - */ -.align 12 -arm64_bpt_l0_pt5: - pte_zero ,4 - pte_fill 0x40a04000, 508, 0, PTE_PAGE_NORMAL_RWX - -#if CONFIG_PAGING -/* L2: 255.5 TiB - 256TiB (1GiB / entry) - * - * 0x0000ff8000000000 - 0x0000ffffffffffff Direct-mapped - */ -.align 12 -arm64_bpt_l2_pt511: - pte_fill 0x0000000000000000, 512, 2, PTE_BLOCK_NORMAL_RW -#endif /* CONFIG_PAGING */ diff --git a/d9_mrds.c b/d9_mrds.c new file mode 100644 index 0000000..bb721ae --- /dev/null +++ b/d9_mrds.c @@ -0,0 +1,204 @@ +/* SPDX-License-Identifier: Apache-2.0 + * Copyright 2024 The TenonOS Authors + */ + +#include +#include + +/* ------------------------- Memory Map of myd-jd9x ----------------------- + * + * 0x0000,0000,0000 - 0x0000,3FFF,FFFF Device: attr:device + * 0x0000,4000,0000 - 0x0000,FFFF,FFFF Normal Mem: 1-4GB attr:normal + * 0x0001,0000,0000 - 0x0004,3FFF,FFFF Normal Mem: 4GB-17GB attr:normal + * 0x0005,0000,0000 - 0x0006,FFFF,FFFF PCIe_MAPPED_IO attr:device + * Notice: The page tables below use the Unikraft indexing convention. + */ +struct ukplat_memregion_desc bpt_unmap_mrd __section(".data") = { + .pbase = ALIGN_DOWN(0x40000000UL, __PAGE_SIZE), + .vbase = ALIGN_DOWN(0x40000000UL, __PAGE_SIZE), + .pg_off = 0x0UL, + .len = 0xc0000000UL, + .pg_count = PAGE_COUNT(0xc0000000UL), + .type = UKPLAT_MEMRT_RESERVED, + .flags = UKPLAT_MEMRF_UNMAP +#ifdef CONFIG_UKPLAT_MEMRNAME + , + .name = { 0 } +#endif + }; + +#ifdef CONFIG_STATIC_PGTABLE +struct ukplat_memregion_desc + bpt_memregion[] __section(".tn_static_memregion") = { + /* DEVICE + * Virtual address: 0x0000000000000000 - 0x000000003FFFFFFF + * Physical address: 0x0000000000000000 - 0x000000003FFFFFFF + */ + { .pbase = ALIGN_DOWN(0x0UL, __PAGE_SIZE), + .vbase = ALIGN_DOWN(0x0UL, __PAGE_SIZE), + .pg_off = 0x0, + .len = 0x40000000UL, + .pg_count = PAGE_COUNT(0x40000000UL), + .type = UKPLAT_MEMRT_RESERVED, + .flags = UKPLAT_MEMRF_VALUE_IS_WR | + UKPLAT_MEMRF_MAIR(UKPLAT_MEMRF_MAIR_DEVICE_nGnRnE) | + UKPLAT_MEMRF_LEVEL(UKPLAT_MEMRF_LEVEL_PMD) +#ifdef CONFIG_UKPLAT_MEMRNAME + , + .name = { 0 } +#endif /* CONFIG_UKPLAT_MEMRNAME */ + }, + /* RAM + * Virtual address: 0x0000000040a04000 - 0x0000000040bfffff + * Physical address: 0x0000000040a04000 - 0x0000000040bfffff + */ + { .pbase = ALIGN_DOWN(0x40a04000UL, __PAGE_SIZE), + .vbase = ALIGN_DOWN(0x40a04000UL, __PAGE_SIZE), + .pg_off = 0x0, + .len = 0x1fc000UL, + .pg_count = PAGE_COUNT(0x1fc000UL), + .type = UKPLAT_MEMRT_FREE, + .flags = UKPLAT_MEMRF_VALUE_IS_WR | UKPLAT_MEMRF_UXN | + UKPLAT_MEMRF_MAIR(UKPLAT_MEMRF_MAIR_NORMAL_WB) | + UKPLAT_MEMRF_LEVEL(UKPLAT_MEMRF_LEVEL_PAGE) +#ifdef CONFIG_UKPLAT_MEMRNAME + , + .name = { 0 } +#endif /* CONFIG_UKPLAT_MEMRNAME */ + }, + /* RAM + * Virtual address: 0x0000000040C00000 - 0x00000000459FFFFF + * Physical address: 0x0000000040C00000 - 0x00000000459FFFFF + */ + { .pbase = ALIGN_DOWN(0x40C00000UL, __PAGE_SIZE), + .vbase = ALIGN_DOWN(0x40C00000UL, __PAGE_SIZE), + .pg_off = 0x0, + .len = 0x4E00000UL, + .pg_count = PAGE_COUNT(0x4E00000UL), + .type = UKPLAT_MEMRT_FREE, + .flags = UKPLAT_MEMRF_VALUE_IS_WR | UKPLAT_MEMRF_UXN | + UKPLAT_MEMRF_MAIR(UKPLAT_MEMRF_MAIR_NORMAL_WB) | + UKPLAT_MEMRF_LEVEL(UKPLAT_MEMRF_LEVEL_PMD) +#ifdef CONFIG_UKPLAT_MEMRNAME + , + .name = { 0 } +#endif /* CONFIG_UKPLAT_MEMRNAME */ + }, + /* RAM + * Virtual address: 0x0000000057200000 - 0x00000000771FFFFF + * Physical address: 0x0000000057200000 - 0x00000000771FFFFF + */ + { .pbase = ALIGN_DOWN(0x57200000UL, __PAGE_SIZE), + .vbase = ALIGN_DOWN(0x57200000UL, __PAGE_SIZE), + .pg_off = 0x0, + .len = 0x20000000UL, + .pg_count = PAGE_COUNT(0x20000000UL), + .type = UKPLAT_MEMRT_FREE, + .flags = UKPLAT_MEMRF_VALUE_IS_WR | UKPLAT_MEMRF_UXN | + UKPLAT_MEMRF_MAIR(UKPLAT_MEMRF_MAIR_NORMAL_WB) | + UKPLAT_MEMRF_LEVEL(UKPLAT_MEMRF_LEVEL_PMD) +#ifdef CONFIG_UKPLAT_MEMRNAME + , + .name = { 0 } +#endif /* CONFIG_UKPLAT_MEMRNAME */ + }, + /* RAM + * Virtual address: 0x000000007C600000 - 0x000000007FFFFFFF + * Physical address: 0x000000007C600000 - 0x000000007FFFFFFF + */ + { .pbase = ALIGN_DOWN(0x7C600000UL, __PAGE_SIZE), + .vbase = ALIGN_DOWN(0x7C600000UL, __PAGE_SIZE), + .pg_off = 0x0, + .len = 0x3A00000UL, + .pg_count = PAGE_COUNT(0x3A00000UL), + .type = UKPLAT_MEMRT_FREE, + .flags = UKPLAT_MEMRF_VALUE_IS_WR | UKPLAT_MEMRF_UXN | + UKPLAT_MEMRF_MAIR(UKPLAT_MEMRF_MAIR_NORMAL_WB) | + UKPLAT_MEMRF_LEVEL(UKPLAT_MEMRF_LEVEL_PMD) +#ifdef CONFIG_UKPLAT_MEMRNAME + , + .name = { 0 } +#endif /* CONFIG_UKPLAT_MEMRNAME */ + }, + /* RAM + * Virtual address: 0x0000000080000000 - 0x00000000BFFFFFFF + * Physical address: 0x0000000080000000 - 0x00000000BFFFFFFF + */ + { .pbase = ALIGN_DOWN(0x80000000UL, __PAGE_SIZE), + .vbase = ALIGN_DOWN(0x80000000UL, __PAGE_SIZE), + .pg_off = 0x0, + .len = 0x40000000UL, + .pg_count = PAGE_COUNT(0x40000000UL), + .type = UKPLAT_MEMRT_FREE, + .flags = UKPLAT_MEMRF_VALUE_IS_WR | UKPLAT_MEMRF_UXN | + UKPLAT_MEMRF_MAIR(UKPLAT_MEMRF_MAIR_NORMAL_WB) | + UKPLAT_MEMRF_LEVEL(UKPLAT_MEMRF_LEVEL_PUD) +#ifdef CONFIG_UKPLAT_MEMRNAME + , + .name = { 0 } +#endif /* CONFIG_UKPLAT_MEMRNAME */ + }, + /* DEVICE + * Virtual address: 0x0000000100000000 - 0x000000043FFFFFFF + * Physical address: 0x0000000100000000 - 0x000000043FFFFFFF + */ + { .pbase = ALIGN_DOWN(0x100000000UL, __PAGE_SIZE), + .vbase = ALIGN_DOWN(0x100000000UL, __PAGE_SIZE), + .pg_off = 0x0, + .len = 0x340000000UL, + .pg_count = PAGE_COUNT(0x340000000UL), + .type = UKPLAT_MEMRT_RESERVED, + .flags = UKPLAT_MEMRF_VALUE_IS_WR | + UKPLAT_MEMRF_MAIR(UKPLAT_MEMRF_MAIR_DEVICE_nGnRnE) | + UKPLAT_MEMRF_LEVEL(UKPLAT_MEMRF_LEVEL_PUD) +#ifdef CONFIG_UKPLAT_MEMRNAME + , + .name = { 0 } +#endif /* CONFIG_UKPLAT_MEMRNAME */ + }, + /* DEVICE + * Virtual address: 0x0000000500000000 - 0x00000006FFFFFFFF + * Physical address: 0x0000000500000000 - 0x00000006FFFFFFFF + */ + { .pbase = ALIGN_DOWN(0x500000000UL, __PAGE_SIZE), + .vbase = ALIGN_DOWN(0x500000000UL, __PAGE_SIZE), + .pg_off = 0x0, + .len = 0x200000000UL, + .pg_count = PAGE_COUNT(0x200000000UL), + .type = UKPLAT_MEMRT_RESERVED, + .flags = UKPLAT_MEMRF_VALUE_IS_WR | + UKPLAT_MEMRF_MAIR(UKPLAT_MEMRF_MAIR_DEVICE_nGnRnE) | + UKPLAT_MEMRF_LEVEL(UKPLAT_MEMRF_LEVEL_PUD) +#ifdef CONFIG_UKPLAT_MEMRNAME + , + .name = { 0 } +#endif /* CONFIG_UKPLAT_MEMRNAME */ + } + }; + +#ifdef CONFIG_PAGING +struct ukplat_memregion_desc + direct_map_mrd __section(".tn_direct_memregion") = { + /* Direct-mapped + * Virtual address: 0x0000ff8000000000 - 0x0000ffffffffffff + * Physical address: 0x0000000000000000 - 0x0000008000000000 + */ + .pbase = ALIGN_DOWN(0x0UL, __PAGE_SIZE), + .vbase = ALIGN_DOWN(0xff8000000000UL, __PAGE_SIZE), + .pg_off = 0x0, + .len = 0x8000000000UL, + .pg_count = PAGE_COUNT(0x8000000000UL), + .type = UKPLAT_MEMRT_RESERVED, + .flags = UKPLAT_MEMRF_VALUE_IS_WR | + UKPLAT_MEMRF_MAIR(UKPLAT_MEMRF_MAIR_NORMAL_WB) | + UKPLAT_MEMRF_LEVEL(UKPLAT_MEMRF_LEVEL_PUD) +#ifdef CONFIG_UKPLAT_MEMRNAME + , + .name = { 0 } +#endif /* CONFIG_UKPLAT_MEMRNAME */ +}; +#endif + +__u32 bpt_memregion_count = + sizeof(bpt_memregion) / sizeof(struct ukplat_memregion_desc); +#endif diff --git a/start.S b/start.S index 2dfd816..0a83a6f 100644 --- a/start.S +++ b/start.S @@ -5,7 +5,6 @@ #include #include #include -#include #include #include diff --git a/static_memregion.lds.S b/static_memregion.lds.S new file mode 100644 index 0000000..bed1af2 --- /dev/null +++ b/static_memregion.lds.S @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: Apache-2.0 + * Copyright 2024 The TenonOS Authors + */ + +SECTIONS { + . = ALIGN(8); + .tn_static_memregion : + { + KEEP(*(.tn_static_memregion)) + } +} +INSERT AFTER .data -- Gitee