[submodule "riscv-binutils"]
	path = riscv-binutils
	url = https://github.com/THU-DSP-LAB/riscv-binutils.git
	branch = main
[submodule "riscv-gcc"]
	path = riscv-gcc
	url = https://github.com/riscv-collab/riscv-gcc.git
	branch = riscv-gcc-10.2.0
[submodule "glibc"]
	path = glibc
	url = https://sourceware.org/git/glibc.git
[submodule "riscv-dejagnu"]
	path = riscv-dejagnu
	url = https://github.com/riscv-collab/riscv-dejagnu.git
	branch = riscv-dejagnu-1.6
[submodule "newlib"]
	path = newlib
	url = https://sourceware.org/git/newlib-cygwin.git
	branch = master
[submodule "riscv-gdb"]
	path = riscv-gdb
	url = https://github.com/riscv-collab/riscv-binutils-gdb.git
	branch = fsf-gdb-10.1-with-sim
[submodule "qemu"]
	path = qemu
	url = https://git.qemu.org/git/qemu.git
[submodule "musl"]
	path = musl
	url = https://git.musl-libc.org/musl
	branch = master
[submodule "spike"]
	path = spike
	url = https://git.tsinghua.edu.cn/gpu-dsplab/riscv-isa-sim-gpgpu.git
	branch = master
[submodule "pk"]
	path = pk
	url = https://github.com/riscv-software-src/riscv-pk.git
	branch = master