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Release_Notes.html

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<h1 id="release-notes-for-stm32f4xx-hal-drivers"><small>Release Notes for</small> STM32F4xx HAL Drivers</h1>
<p>Copyright © 2017 STMicroelectronics<br />
</p>
<a href="https://www.st.com" class="logo"><img src="_htmresc/st_logo_2020.png" alt="ST logo" /></a>
</center>
<h1 id="purpose">Purpose</h1>
<p>The STM32Cube HAL and LL, an STM32 abstraction layer embedded software, ensure maximized portability across STM32 portfolio.</p>
<p>The Portable APIs layer provides a generic, multi instanced and simple set of APIs to interact with the upper layer (application, libraries and stacks). It is composed of native and extended APIs set. It is directly built around a generic architecture and allows the build-upon layers, like the middleware layer, to implement its functions without knowing in-depth the used STM32 device. This improves the library code reusability and guarantees an easy portability on other devices and STM32 families.</p>
<p>The Low Layer (LL) drivers are part of the STM32Cube firmware HAL that provide basic set of optimized and one shot services. The Low layer drivers, contrary to the HAL ones are not Fully Portable across the STM32 families; the availability of some functions depend on the physical availability of the relative features on the product. The Low Layer (LL) drivers are designed to offer the following features:</p>
<ul>
<li>New set of inline function for direct and atomic register access</li>
<li>One-shot operations that can be used by the HAL drivers or from application level.</li>
<li>Fully Independent from HAL and can be used in standalone usage (without HAL drivers)</li>
<li>Full features coverage of the all the supported peripherals.</li>
</ul>
</div>
<div class="col-sm-12 col-lg-8">
<h1 id="update-history">Update History</h1>
<div class="collapse">
<input type="checkbox" id="collapse-section33" checked aria-hidden="true"> <label for="collapse-section33" aria-hidden="true">V1.8.3 / 31-May-2024</label>
<div>
<h2 id="main-changes">Main Changes</h2>
<ul>
<li>Enhance HAL code quality for MISRA-C Rule-8.13 by adding const qualifiers.</li>
<li><strong>HAL Generic</strong>
<ul>
<li>Update stm32h7xx_hal_conf_template.h file to support legacy HAL ETH driver.</li>
</ul></li>
<li><strong>HAL/LL ADC</strong>
<ul>
<li>Add macro UNUSED() to avoid the generation of a warning related to the unused argument ‘hadc’.</li>
</ul></li>
<li><strong>HAL RCC</strong>
<ul>
<li>Remove duplicate macro definition __HAL_RCC_AHB2_FORCE_RESET() for STM32F423xx devices.</li>
</ul></li>
<li><strong>HAL EXTI</strong>
<ul>
<li>Add macro UNUSED() to avoid the generation of a warning related to the unused argument ‘Edge’.</li>
</ul></li>
<li><strong>HAL HASH</strong>
<ul>
<li>Read the last remaining bytes (3 or 2 or 1) of the data in a temporary variable (taking into account swap mode) and enter this variable into the HASH-&gt;DIN when the data is not a multiple of 4 bytes.</li>
</ul></li>
<li><strong>HAL FLASH</strong>
<ul>
<li>Remove HAL_LOCK()/HAL_UNLOCK() APIs from HAL_FLASH_Program_IT() and HAL_FLASHEx_Erase_IT() APIs.</li>
</ul></li>
<li><strong>LL DMA</strong>
<ul>
<li>Fix typo in LL_DMA_GetCurrentTargetMem() API.</li>
</ul></li>
<li><strong>HAL LPTIM</strong>
<ul>
<li>Remove redundant macro IS_LPTIM_AUTORELOAD().</li>
</ul></li>
<li><strong>HAL/LL CORTEX</strong>
<ul>
<li>Updated HAL_MPU_ConfigRegion() API to allow the configuration of the MPU registers independently of the value of Enable/Disable field.</li>
<li>Add new HAL_MPU_EnableRegion() / HAL_MPU_DisableRegion() APIs.</li>
<li>Add missing parenthesis() in LL_MPU_ConfigRegion() API.</li>
</ul></li>
<li><strong>HAL DSI</strong>
<ul>
<li>Align DSI Initialization sequence to the recommended ‘Programing procedure overview’ part to avoid DSI read LCD controller register 0x0A error.</li>
</ul></li>
<li><strong>HAL QSPI</strong>
<ul>
<li>Clear the QSPI.AR register when sCommand.AddressMode is QSPI_ADDRESS_NONE.</li>
</ul></li>
<li><strong>HAL I2S</strong>
<ul>
<li>Update HAL I2S driver to fix misplaced __HAL_LOCK() API and remove ‘go to’ instruction.</li>
</ul></li>
<li><strong>HAL SPI</strong>
<ul>
<li>Update HAL SPI driver to remove “got to” instruction and avoid misplaced __HAL_LOCK() API issue.</li>
</ul></li>
<li><strong>HAL UART</strong>
<ul>
<li>Rework of UART_WaitOnFlagUntilTimeout() API to avoid being stuck forever when UART overrun error occurs and to enhance behavior.</li>
</ul></li>
<li><strong>HAL ETH</strong>
<ul>
<li>Add missing system time in different PTP APIs.</li>
<li>Rename ETH_TxPacketConfig_t to ETH_TxPacketConfigTypeDef.</li>
<li>Update ETH_Start_IT sequence.</li>
<li>Update the PTP configuration state macros and Fix the wrong Doxygen comment descriptions.</li>
<li>Fix wrong Ethernet constant definitions .</li>
<li>Add condition to get the Timestamp only when it was captured (Check on Last Descriptor and TimeStamp flag set).</li>
<li>Replace ETH_RX_BUF_SIZE define in ETH_UpdateDescriptor() and ETH_DMARxDescListInit() by Init.RxBuffLen.</li>
<li>Get the latest buffer length received and not the predefined ethernet frame length.</li>
<li>Update HAL_ETH_SetMDIOClockRange API to manage different frequency ranges.</li>
<li>Remove multiple volatile reads or writes in interrupt handler for better performance.</li>
<li>Move the MMC interrupts disable section from HAL_ETH_Start_IT() to HAL_ETH_Init().</li>
<li>Change the way to increment the descriptor index within HAL_ETH_ReleaseTxPacket().</li>
<li>Update the entry to critical section without enabling unwanted global interrupts.</li>
<li>Add support of CRC stripping for Type frames (CSTF) feature.</li>
<li>Fix MisraC-2012 and MCU ASTYLE warnings and remove empty lines.</li>
</ul></li>
<li><strong>HAL USB</strong>
<ul>
<li>Ensure to reactivate the usb channel in case of transfer error.</li>
</ul></li>
<li><strong>LL UTILS</strong>
<ul>
<li>Fix a note about Ticks parameter.</li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section32" aria-hidden="true"> <label for="collapse-section32" aria-hidden="true">V1.8.2 / 01-November-2023</label>
<div>
<h2 id="main-changes-1">Main Changes</h2>
<ul>
<li>General updates to fix known defects and implementation enhancements.</li>
<li>HAL code quality enhancement for MISRA-C Rule-8.13 by adding const qualifiers.</li>
<li><strong>HAL Generic</strong> update
<ul>
<li>Allow redefinition of macro UNUSED(x).</li>
</ul></li>
<li><strong>HAL RCC</strong> update
<ul>
<li>Correct the configuration macro of I2S clock source and the value of I2S external clock source.</li>
<li>Set the minimum value of PLLM.</li>
<li>Update the rest values for the macro __HAL_RCC_Axxx_FORCE_RESET() to avoid setting reserved bits.</li>
</ul></li>
<li><strong>HAL PWR</strong> update
<ul>
<li>Add a call to UNUSED() macro to avoid the generation of a warning related to the unused argument ‘Regulator’.</li>
<li>Add PWR_SLEEPENTRY_WFE_NO_EVT_CLEAR mode to avoid systematic clear of event in HAL_PWR_EnterSLEEPMode() and HAL_PWR_EnterSTOPMode().</li>
</ul></li>
<li><strong>HAL Cortex</strong> update
<ul>
<li>Add the following new HAL/LL CORTEX APIs to clear PWR pending event:
<ul>
<li>LL_LPM_ClearEvent().</li>
<li>HAL_CORTEX_ClearEvent().</li>
</ul></li>
</ul></li>
<li><strong>HAL EXTI</strong> update
<ul>
<li>Fix computation of pExtiConfig-&gt;GPIOSel in HAL_EXTI_GetConfigLine.</li>
</ul></li>
<li><strong>HAL/LL ADC</strong> update
<ul>
<li>Cast both LL_ADC_REG_ReadConversionData6() and LL_ADC_REG_ReadConversionData8() returned values from uint16_t to uint8_t to be consistent with prototypes.</li>
<li>Add a call to UNUSED() macro in LL_ADC_DMA_GetRegAddr() API to prevent compilation warning due to unused ‘Register’ parameter.</li>
</ul></li>
<li><strong>HAL DAC</strong> update
<ul>
<li>Fix incorrect word ‘surcharged’ in functions headers.</li>
<li>Updated DAC buffer calibration according to RM.</li>
</ul></li>
<li><strong>HAL CEC</strong> update
<ul>
<li>Better performance by removing multiple volatile reads or writes in interrupt handler.</li>
</ul></li>
<li><strong>HAL RTC</strong> update
<ul>
<li>Check if the RTC calendar has been previously initialized before entering initialization mode.</li>
<li>Remove macro __HAL_RTC_TAMPER_GET_IT() as it is redundant with macro __HAL_RTC_TAMPER_GET_FLAG() and create an alias into the stm32_hal_legacy.h file.</li>
<li>Correct misleading note about shadow registers.</li>
</ul></li>
<li><strong>HAL CRYP</strong> update
<ul>
<li>Update Crypt/Decrypt IT processes to avoid Computation Completed IRQ fires before the DINR pointer increment.</li>
</ul></li>
<li><strong>HAL HASH</strong> update
<ul>
<li>HAL code quality enhancement for MISRA-C2012 Rule-2.2_c.</li>
</ul></li>
<li><strong>HAL TIM</strong> update
<ul>
<li>Align TIM_TIM2_ETH_PTP definition with the reference manual specification.</li>
<li>Improve driver robustness against wrong period values.</li>
<li>Improve driver robustness against wrong DMA related parameters.</li>
<li>Improve period configuration parameter check.</li>
<li>Remove Lock management from callback management functions.</li>
<li>Remove multiple volatile reads or writes in interrupt handler for better performance.</li>
<li>Improve HAL TIM driver’s operational behavior.</li>
<li>Remove unnecessary change of MOE bitfield in LL_TIM_BDTR_Init().</li>
</ul></li>
<li><strong>HAL LPTIM</strong> update
<ul>
<li>Apply same naming rules to clear FLAG related functions.</li>
<li>Remove Lock management from callback management functions.</li>
</ul></li>
<li><strong>HAL CAN</strong> update
<ul>
<li>Removal of never reached code.</li>
<li>Improve protection against bad inputs.</li>
</ul></li>
<li><strong>HAL DSI</strong> update
<ul>
<li>Update to align DSI ULPS entry and exit sequences with reference manual.</li>
</ul></li>
<li><strong>HAL ETH</strong> update
<ul>
<li>Update Rx descriptor tail pointer management to avoid race condition.</li>
</ul></li>
<li><strong>HAL UART</strong> update
<ul>
<li>New API HAL_UARTEx_GetRxEventType() to retrieve the type of event that has led the RxEventCallback execution.</li>
<li>Removal of HAL_LOCK/HAL_UNLOCK() calls in HAL UART Tx and Rx APIs.</li>
<li>Removal of __HAL_LOCK() from HAL_xxx_RegisterCallback()/HAL_xxx_UnRegisterCallback().</li>
<li>Avoid ORE flag to be cleared by a transmit process in polling mode.</li>
<li>Rework of UART_WaitOnFlagUntilTimeout() API to avoid being stuck forever when UART overrun error occurs and to enhance behavior.</li>
</ul></li>
<li><strong>HAL USART</strong> update
<ul>
<li>Removal of __HAL_LOCK() from HAL_xxx_RegisterCallback()/HAL_xxx_UnRegisterCallback().</li>
</ul></li>
<li><strong>HAL I2C</strong> update
<ul>
<li>Declare an internal macro link to DMA macro to check remaining data: I2C_GET_DMA_REMAIN_DATA.</li>
<li>Update I2C_MemoryTransmit_TXE_BTF process to disable TXE and BTF interrupts if nothing to do.</li>
<li>Clear TXE Flag at the end of transfer.</li>
<li>Move polling code of HAL memory interface through interrupt management to prevent timeout issue using HAL MEM interface through FreeRTOS.</li>
<li>Update I2C_IsErrorOccurred to return error if timeout is detected.</li>
<li>Clear the ADDRF flag only when direction is confirmed as changed, to prevent that the ADDRF flag is cleared too early when the restart is received.</li>
<li>Update HAL_I2C_Master_Transmit_IT to return HAL_BUSY instead of HAL_ERROR when timeout occur and I2C_FLAG_BUSY is SET.</li>
<li>Clear ACK bit once 3 bytes to read remain to be able to send the NACK once the transfer ends.</li>
<li>Duplicate the test condition after timeout detection to avoid false timeout detection.</li>
<li>Update HAL_I2C_IsDeviceReady() API to support 10_bit addressing mode: macro I2C_GENERATE_START is updated.</li>
<li>Update HAL I2C driver to prefetch data before starting the transmission: implementation of errata sheet workaround I2C2-190208 : Transmission stalled after first byte.</li>
<li>Update the HAL I2C driver to disactivate all interrupts after the end of transaction.</li>
<li>Update HAL_I2C_Init API to clear ADD10 bit in 7 bit addressing mode.</li>
<li>Solve Slave No stretch not functional by using HAL Slave interface.</li>
<li>Update HAL_FMPI2C_Mem_Write_IT API to initialize XferSize at 0.</li>
<li>Update I2C_Slave_ISR_IT, I2C_Slave_ISR_DMA and I2C_ITSlaveCplt to prevent the call of HAL_I2C_ListenCpltCallback twice.</li>
<li>Update I2C_WaitOnRXNEFlagUntilTimeout to check I2C_FLAG_AF independently from I2C_FLAG_RXNE.</li>
<li>Clear ACK bit once 3 bytes to read remain to be able to send the NACK once the transfer ends.</li>
<li>Remove the unusable code in function HAL_I2C_IsDeviceReady.</li>
<li>Update HAL_I2C_Master_Abort_IT to support memory abort transfer.</li>
<li>Update LL_I2C_HandleTranfer function to prevent undefined behavior of volatile usage before updating the CR2 register.</li>
<li>Update I2C_WaitOnFlagUntilTimeout to handle error case.</li>
<li>Update the HAL I2C driver to reset PreviousState to I2C_STATE_NONE at the end of transfer.</li>
</ul></li>
<li><strong>HAL SMBUS</strong> update
<ul>
<li>Update to fix issue of mismatched data received by master in case of data size to be transmitted by the slave is greater than the data size to be received by the master.</li>
<li>Add flush on TX register.</li>
<li>Change previous state from HAL_SMBUS_STATE_READY to HAL_SMBUS_STATE_NONE at the end of transfer.</li>
<li>Update HAL SMBUS driver to prefetch data before starting the transmission: implementation of errata sheet workaround I2C2-190208 : Transmission stalled after first byte.</li>
</ul></li>
<li><strong>HAL SAI</strong> update
<ul>
<li>Improve audio quality (avoid potential glitch).</li>
<li>Fix incorrect word ‘surcharged’.</li>
</ul></li>
<li><strong>HAL SPI</strong> update
<ul>
<li>Fix driver to don’t update state in case of error (HAL_SPI_STATE_READY will be set only in case of HAL_TIMEOUT).</li>
<li>Update HAL_SPI_TransmitReceive API to set the bit CRCNEXT in case of one byte transaction.</li>
<li>Update IT API to enable interrupts after process unlock.</li>
<li>Add wait on flag TXE to be set at the end of transaction to be aligned with reference manual.</li>
</ul></li>
<li><strong>HAL SPDIFRX</strong> update
<ul>
<li>Prevent hard fault by checking DMA usage.</li>
<li>Tuning of default SPDIFRX timeout.</li>
</ul></li>
<li><strong>HAL USB OTG</strong> update
<ul>
<li>ll_usb.c fix added to USB_ClearInterrupts(), should write “1” to clear the interrupt status bits of OTG_FS_GINTSTS register.</li>
<li>ll_usb.c: remove useless software setting to setup the frame interval at 80%.</li>
<li>ll_usb.c, hal_hcd.c: adding support of hub split transactions.</li>
<li>ll_usb.c: improve delay management to set core mode.</li>
<li>ll_usb.c, hal_pcd.c: fix device connection in case battery charging used with HS instance linked to internal FS PHY.</li>
<li>ll_usb.c: increase timeout value to allow core reset to complete.</li>
</ul></li>
<li><strong>HAL IRDA</strong> update
<ul>
<li>Removal of __HAL_LOCK() from HAL_xxx_RegisterCallback()/HAL_xxx_UnRegisterCallback().</li>
</ul></li>
<li><strong>HAL SMARTCARD</strong> update
<ul>
<li>Removal of __HAL_LOCK() from HAL_xxx_RegisterCallback()/HAL_xxx_UnRegisterCallback().</li>
</ul></li>
<li><strong>HAL SDMMC</strong> update
<ul>
<li>Update HAL SD processes to manage STBITERR flag.</li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section31" aria-hidden="true"> <label for="collapse-section31" aria-hidden="true">V1.8.1 / 24-June-2022</label>
<div>
<h2 id="main-changes-2">Main Changes</h2>
<ul>
<li>General updates to fix HAL ETH defects and implementation enhancements.</li>
<li><strong>HAL</strong> updates
<ul>
<li><strong>HAL ETH</strong> update
<ul>
<li>Remove useless assert_param(IS_ETH_MAC_ADDRESS0123(MacAddr)) from static function ETH_MACAddressConfig().</li>
<li>Replace hard coded Rx buffer size (1000U) by macro ETH_RX_BUF_SIZE.</li>
<li>Correct bit positions when getting MAC and DMA configurations and replace ‘UnicastSlowProtocolPacketDetect’ by ‘UnicastPausePacketDetect’ in the MAC default configuration structure.</li>
<li>Ensure a delay of 4 TX_CLK/RX_CLK cycles between two successive write operations to the same register.</li>
<li>Disable DMA transmission in both HAL_ETH_Stop_IT() and HAL_ETH_Stop() APIs.</li>
</ul></li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section30" aria-hidden="true"> <label for="collapse-section30" aria-hidden="true">V1.8.0 / 11-February-2022</label>
<div>
<h2 id="main-changes-3">Main Changes</h2>
<ul>
<li>General updates to fix known defects and implementation enhancements.</li>
<li>All source files: update disclaimer to add reference to the new license agreement.</li>
<li><strong>The following changes done on the HAL drivers require an update of the application code based on older HAL versions</strong>
<ul>
<li>Rework of HAL Ethernet driver to resolve problems and improve performance (<strong>compatibility break</strong>).</li>
<li>A new HAL Ethernet driver has been redesigned with new APIs, to bypass limitations with previous HAL Ethernet driver version.</li>
<li>The new HAL Ethernet driver is the recommended version. It is located as usual in Drivers/STM32F4xx_HAL_Driver/Src and Drivers/STM32F4xx_HAL_Driver/Inc folders.
<ul>
<li>It can be enabled through switch HAL_ETH_MODULE_ENABLED in stm32f4xx_hal_conf.h</li>
</ul></li>
<li>The legacy HAL Ethernet driver is also present in the release in Drivers/STM32F4xx_HAL_Driver/Src/Legacy and Drivers/STM32F4xx_HAL_Driver/Inc/Legacy folders for software compatibility reasons.
<ul>
<li>Its usage is not recommended as deprecated. It can however be enabled through switch HAL_ETH_LEGACY_MODULE_ENABLED in stm32f4xx_hal_conf.h</li>
</ul></li>
</ul></li>
<li><strong>HAL</strong> update
<ul>
<li><strong>HAL ETH</strong> update
<ul>
<li>Entire receive process reworked.</li>
<li>Resolve the problem of received data corruption.</li>
<li>Implement transmission in interrupt mode.</li>
<li>Handle one interrupt for multiple transmitted packets.</li>
<li>Implement APIs to handle PTP feature.</li>
<li>Implement APIs to handle Timestamp feature.</li>
<li>Add support of receive buffer unavailable.</li>
<li>Update HAL_ETH_IRQHandler() to handle receive buffer unavailable.</li>
</ul></li>
<li><strong>HAL SMBUS</strong> update
<ul>
<li>Update to fix issue of mismatched data received by master in case of data size to be transmitted by the slave is greater than the data size to be received by the master.
<ul>
<li>Add flush on TX register.</li>
</ul></li>
</ul></li>
<li><strong>HAL TIM</strong> update
<ul>
<li>__LL_TIM_CALC_PSC() macro update to round up the evaluate value when the fractional part of the division is greater than 0.5.</li>
</ul></li>
<li><strong>HAL LPTIM</strong> update
<ul>
<li>Add check on PRIMASK register to prevent from enabling unwanted global interrupts within LPTIM_Disable() and LL_LPTIM_Disable()</li>
</ul></li>
<li><strong>HAL UART</strong> update
<ul>
<li>Add const qualifier for read only pointers.</li>
<li>Improve header description of UART_WaitOnFlagUntilTimeout() function.</li>
<li>Add a check on the UART parity before enabling the parity error interruption.</li>
<li>Fix typo in UART_IT_TXE bit description.</li>
</ul></li>
<li><strong>HAL IRDA</strong> update
<ul>
<li>Improve header description of IRDA_WaitOnFlagUntilTimeout() function.</li>
<li>Add a check on the IRDA parity before enabling the parity error interrupt.</li>
<li>Add const qualifier for read only pointers.</li>
</ul></li>
<li><strong>HAL SMARTCARD</strong> update
<ul>
<li>Improve header description of SMARTCARD_WaitOnFlagUntilTimeout() function</li>
<li>Add const qualifier for read only pointers.</li>
</ul></li>
<li><strong>HAL NOR</strong> update
<ul>
<li>Apply adequate commands according to the command set field value</li>
<li>command set 1 for Micron JS28F512P33</li>
<li>command set 2 for Micron M29W128G and Cypress S29GL128P</li>
<li>Add new command operations:
<ul>
<li>NOR_CMD_READ_ARRAY</li>
<li>NOR_CMD_WORD_PROGRAM</li>
<li>NOR_CMD_BUFFERED_PROGRAM</li>
<li>NOR_CMD_CONFIRM</li>
<li>NOR_CMD_BLOCK_ERASE</li>
<li>NOR_CMD_BLOCK_UNLOCK</li>
<li>NOR_CMD_READ_STATUS_REG</li>
<li>NOR_CMD_CLEAR_STATUS_REG</li>
</ul></li>
<li>Update some APIs in order to be compliant for memories with different command set, the updated APIs are:
<ul>
<li>HAL_NOR_Init()</li>
<li>HAL_NOR_Read_ID()</li>
<li>HAL_NOR_ReturnToReadMode()</li>
<li>HAL_NOR_Read()</li>
<li>HAL_NOR_Program()</li>
<li>HAL_NOR_ReadBuffer()</li>
<li>HAL_NOR_ProgramBuffer()</li>
<li>HAL_NOR_Erase_Block()</li>
<li>HAL_NOR_Erase_Chip()</li>
<li>HAL_NOR_GetStatus()</li>
</ul></li>
<li>Align HAL_NOR_Init() API with core of the function when write operation is disabled to avoid HardFault.</li>
</ul></li>
<li><strong>HAL SDMMC</strong> update
<ul>
<li>Take into account the voltage range in the CMD1 command.</li>
<li>Add new LL function to have correct response for MMC driver.</li>
<li>Update the driver to have all fields correctly initialized.</li>
<li>Add an internal variable to manage the power class and call it before to update speed of bus width.</li>
<li>Add new API to get the value of the Extended CSD register and populate the ExtCSD field of the MMC handle.</li>
<li>In HAL_MMC_InitCard(), call to SDIO_PowerState_ON() moved after __HAL_MMC_ENABLE() to ensure MMC clock is enabled before the call to HAL_Delay() from within SDIO_PowerState_ON().</li>
</ul></li>
<li><strong>HAL DMA</strong> update
<ul>
<li>Manage the case of an invalid value of CallbackID passed to the HAL_DMA_RegisterCallback() API.</li>
</ul></li>
<li><strong>HAL LTDC</strong> update
<ul>
<li>Update HAL_LTDC_DeInit() to fix MCU Hang up during LCD turn OFF.</li>
</ul></li>
<li><strong>HAL I2C</strong> update
<ul>
<li>Update to fix issue detected due to low system frequency execution (HSI).</li>
<li>Declare an internal macro link to DMA macro to check remaining data: I2C_GET_DMA_REMAIN_DATA</li>
<li>Update HAL I2C Master Receive IT process to safe manage data N= 2 and N= 3.
<ul>
<li>Disable RxNE interrupt if nothing to do.</li>
</ul></li>
</ul></li>
<li><strong>HAL USART</strong> update
<ul>
<li>Improve header description of USART_WaitOnFlagUntilTimeout() function.</li>
<li>Add a check on the USART parity before enabling the parity error interrupt.</li>
<li>Add const qualifier for read only pointers.</li>
</ul></li>
<li><strong>HAL/LL ADC</strong> update
<ul>
<li>Update LL_ADC_IsActiveFlag_MST_EOCS() API to get the appropriate flag.</li>
<li>Better performance by removing multiple volatile reads or writes in interrupt handler.</li>
</ul></li>
<li><strong>HAL FMPI2C</strong> update
<ul>
<li>Update to handle errors in polling mode.
<ul>
<li>Rename I2C_IsAcknowledgeFailed() to I2C_IsErrorOccurred() and correctly manage when error occurs.</li>
</ul></li>
</ul></li>
<li><strong>HAL EXTI</strong> update
<ul>
<li>Update HAL_EXTI_GetConfigLine() API to fix wrong calculation of GPIOSel value.</li>
</ul></li>
<li><strong>HAL QSPI</strong> update
<ul>
<li>Update HAL_QSPI_Abort() and HAL_QSPI_Abort_IT() APIs to check on QSPI BUSY flag status before executing the abort procedure.</li>
</ul></li>
<li><strong>HAL/LL RTC</strong> cleanup
<ul>
<li>Use bits definitions from CMSIS Device header file instead of hard-coded values.</li>
<li>Wrap comments to be 80-character long and correct typos.</li>
<li>Move constants RTC_IT_TAMP. from hal_rtc.h to hal_rtc_ex.h.</li>
<li>Gather all instructions related to exiting the “init” mode into new function RTC_ExitInitMode().</li>
<li>Add new macro assert_param(IS_RTC_TAMPER_FILTER_CONFIG_CORRECT(sTamper-&gt;Filter, sTamper-&gt;Trigger)) to check tamper filtering is disabled in case tamper events are triggered on signal edges.</li>
<li>Rework functions HAL_RTCEx_SetTamper() and HAL_RTCEx_SetTamper_IT() to:
<ul>
<li>Write in TAFCR register in one single access instead of two.</li>
<li>Avoid modifying user structure sTamper.</li>
</ul></li>
<li>Remove functions LL_RTC_EnablePushPullMode() and LL_RTC_DisablePushPullMode() as related to non-supported features.</li>
<li>Remove any reference to non-supported features (e.g., LL_RTC_ISR_TAMP3F).</li>
<li>Remove useless conditional defines as corresponding features are supported by all part-numbers (e.g., #if defined(RTC_TAFCR_TAMPPRCH)).</li>
</ul></li>
<li><strong>HAL USB OTG</strong> update
<ul>
<li>Fix USB_FlushRxFifo() and USB_FlushTxFifo() APIs by adding check on AHB master IDLE state before flushing the USB FIFO</li>
<li>Fix to avoid resetting host channel direction during channel halt</li>
<li>Fix to report correct received amount of data with USB DMA enabled</li>
<li>Fix to avoid compiler optimization on count variable used for USB HAL timeout loop check</li>
<li>Add missing registered callbacks check for HAL_HCD_HC_NotifyURBChange_Callback()</li>
<li>Add new API HAL_PCD_SetTestMode() APIs to handle USB device high speed Test modes</li>
<li>Setting SNAK for EPs not required during device reset</li>
<li>Update USB IRQ handler to enable EP OUT disable</li>
<li>Add support of USB IN/OUT Iso incomplete</li>
<li>Fix USB BCD data contact timeout</li>
</ul></li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section29" aria-hidden="true"> <label for="collapse-section29" aria-hidden="true">V1.7.13 / 16-July-2021</label>
<div>
<h2 id="main-changes-4">Main Changes</h2>
<ul>
<li><strong>HAL</strong> update
<ul>
<li><strong>HAL EXTI</strong> update
<ul>
<li>Update HAL_EXTI_GetConfigLine() API to set default configuration value of Trigger and GPIOSel before checking each corresponding registers.</li>
</ul></li>
<li><strong>HAL GPIO</strong> update
<ul>
<li>Update HAL_GPIO_Init() API to avoid the configuration of PUPDR register when Analog mode is selected.</li>
</ul></li>
<li><strong>HAL DMA</strong> update
<ul>
<li>Update HAL_DMA_IRQHandler() API to set the DMA state before unlocking access to the DMA handle.</li>
</ul></li>
<li><strong>LL ADC</strong> update
<ul>
<li>Update LL_ADC_DeInit() API to clear missing SQR3 register.</li>
</ul></li>
<li><strong>HAL CAN</strong> update
<ul>
<li>Update HAL_CAN_Init() API to be aligned with reference manual and to avoid timeout error.</li>
</ul></li>
<li><strong>HAL/LL RTC_BKP</strong> update
<ul>
<li>Update __HAL_RTC_…(__HANDLE__, …) macros to access registers through (__HANDLE__)-&gt;Instance pointer and avoid “unused variable” warnings.</li>
<li>Correct month management in IS_LL_RTC_MONTH() macro.</li>
</ul></li>
<li><strong>HAL RNG</strong> update
<ul>
<li>Update timeout mechanism to avoid false timeout detection in case of preemption.</li>
</ul></li>
<li><strong>HAL QSPI</strong> update
<ul>
<li>ES0305 workaround disabled for STM32412xx devices.</li>
</ul></li>
<li><strong>HAL I2C</strong> update
<ul>
<li>Update HAL_I2C_Mem_Write_DMA() and HAL_I2C_Mem_Read_DMA() APIs to initialize Devaddress, Memaddress and EventCount parameters.</li>
<li>Update to prevent several calls of Start bit:
<ul>
<li>Update I2C_MemoryTransmit_TXE_BTF() API to increment EventCount.</li>
</ul></li>
<li>Update to avoid I2C interrupt in endless loop:
<ul>
<li>Update HAL_I2C_Master_Transmit_IT(), HAL_I2C_Master_Receive_IT(), HAL_I2C_Master_Transmit_DMA() and HAL_I2C_Master_Receive_DMA() APIs to unlock the I2C peripheral before generating the start.</li>
</ul></li>
<li>Update to use the right macro to clear I2C ADDR flag inside I2C_Slave_ADDR() API as it’s indicated in the reference manual.</li>
<li>Update I2C_IsAcknowledgeFailed() API to avoid I2C in busy state if NACK received after transmitting register address.</li>
<li>Update HAL_I2C_EV_IRQHandler() and I2C_MasterTransmit_BTF() APIs to correctly manage memory transfers:
<ul>
<li>Add check on memory mode before calling callbacks procedures.</li>
</ul></li>
</ul></li>
<li><strong>LL USART</strong> update
<ul>
<li>Handling of UART concurrent register access in case of race condition between Tx and Rx transfers (HAL UART and LL LPUART)</li>
</ul></li>
<li><strong>HAL SMBUS</strong> update
<ul>
<li>Updated HAL_SMBUS_ER_IRQHandler() API to return the correct error code “SMBUS_FLAG_PECERR” in case of packet error occurs.</li>
</ul></li>
<li><strong>HAL/LL SPI</strong> update
<ul>
<li>Updated to fix MISRA-C 2012 Rule-13.2.</li>
<li>Update LL_SPI_TransmitData8() API to avoid casting the result to 8 bits.</li>
</ul></li>
<li><strong>HAL UART</strong> update
<ul>
<li>Fix wrong comment related to RX pin configuration within the description section</li>
<li>Correction on UART ReceptionType management in case of ReceptionToIdle API are called from RxEvent callback</li>
<li>Handling of UART concurrent register access in case of race condition between Tx and Rx transfers (HAL UART and LL LPUART)
<ul>
<li>Update CAN Initialization sequence to set “request initialization” bit before exit from sleep mode.</li>
</ul></li>
</ul></li>
<li><strong>HAL USB</strong> update
<ul>
<li>HAL PCD: add fix transfer complete for IN Interrupt transaction in single buffer mode</li>
<li>Race condition in USB PCD control endpoint receive ISR.</li>
</ul></li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section28" aria-hidden="true"> <label for="collapse-section28" aria-hidden="true">V1.7.12 / 26-March-2021</label>
<div>
<h2 id="main-changes-5">Main Changes</h2>
<ul>
<li><strong>HAL</strong>
<ul>
<li><strong>HAL/LL USART</strong> update
<ul>
<li>Fix typo in USART_Receive_IT() and USART_TransmitReceive_IT() APIs to avoid possible compilation issues if the UART driver files are not included.</li>
</ul></li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section27" aria-hidden="true"> <label for="collapse-section27" aria-hidden="true">V1.7.11 / 12-February-2021</label>
<div>
<h2 id="main-changes-6">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation</li>
<li>Added new <strong>HAL FMPSMBUS extended</strong> driver to support FMPSMBUS fast Mode Plus.</li>
<li>Removed “register” keyword to be compliant with new C++ rules:
<ul>
<li>The register storage class specifier was deprecated in C++11 and removed in C++17.</li>
</ul></li>
<li><strong>HAL</strong>
<ul>
<li><strong>HAL</strong> update</li>
<li>General updates to fix known defects and enhancements implementation.</li>
<li>Added new defines for ARM compiler V6:
<ul>
<li>__weak</li>
<li>__packed</li>
<li>__NOINLINE</li>
</ul></li>
<li>Updated HAL TimeBase TIM, RTC alarm and RTC WakeUp templates for more robustness
<ul>
<li>Updated Hal_Init_Tick() API to properly store the priority when using the non-default time base.</li>
</ul></li>
<li>Updated PPP_MODULE_ENABLED for FMPSMBUS.</li>
<li><strong>HAL/LL ADC</strong> update
<ul>
<li>Updated to add include of the LL ADC driver.</li>
<li>Updated the following APIs to set status HAL_ADC_STATE_ERROR_INTERNAL and error code HAL_ADC_ERROR_INTERNAL when error occurs:
<ul>
<li>HAL_ADC_Start()</li>
<li>HAL_ADC_Start_IT()</li>
<li>HAL_ADC_Start_DMA()</li>
<li>HAL_ADCEx_InjectedStart()</li>
<li>HAL_ADCEx_InjectedStart_IT()</li>
<li>HAL_ADCEx_MultiModeStart_DMA()</li>
</ul></li>
<li>Updated HAL_ADC_Stop_DMA() API to check if DMA state is Busy before calling HAL_DMA_Abort() API to avoid DMA internal error.</li>
<li>Updated IS_ADC_CHANNEL to support temperature sensor for:
<ul>
<li>STM32F411xE</li>
<li>STM32F413xx</li>
<li>STM32F423xx</li>
</ul></li>
<li>Fixed wrong defined values for:
<ul>
<li>LL_ADC_MULTI_REG_DMA_LIMIT_3</li>
<li>LL_ADC_MULTI_REG_DMA_UNLMT_3</li>
</ul></li>
<li>Added __LL_ADC_CALC_VREFANALOG_VOLTAGE() macro to evaluate analog reference voltage.</li>
<li>Removed __LL_ADC_CALC_TEMPERATURE() macro for STM32F4x9 devices as the TS_CAL2 is not available.</li>
</ul></li>
<li><strong>HAL/LL DAC</strong> update
<ul>
<li>Added restruction on DAC Channel 2 defines and parameters.</li>
<li>HAL_DAC_MSPINIT_CB_ID and HAL_DAC_MSPDEINIT_CB_ID used instead of HAL_DAC_MSP_INIT_CB_ID and HAL_DAC_MSP_DEINIT_CB_ID.</li>
<li>Updated to support dual mode:
<ul>
<li>Added two new APIs:
<ul>
<li>HAL_DACEx_DualStart()</li>
<li>HAL_DACEx_DualStop()</li>
</ul></li>
</ul></li>
<li>Added position bit definition to be used instead of __DAC_MASK_SHIFT macro
<ul>
<li>__DAC_MASK_SHIFT macro has been removed.</li>
</ul></li>
<li>Updated HAL_DAC_Start_DMA() API to return HAL_ERROR when error occurs.</li>
<li>Updated HAL_DAC_Stop_DMA() API to not return HAL_ERROR when DAC is already disabled.</li>
</ul></li>
<li><strong>HAL CEC</strong> update
<ul>
<li>Updated HAL_CEC_IRQHandler() API to avoid appending an extra byte to the end of a message.</li>
</ul></li>
<li><strong>HAL/LL GPIO</strong> update
<ul>
<li>Updated IS_GPIO_AF() to add missing values for STM32F401xC and STM32F401xE devices:
<ul>
<li>GPIO_AF3_TIM9</li>
<li>GPIO_AF3_TIM10</li>
<li>GPIO_AF3_TIM11</li>
</ul></li>
<li>Updated LL/HAL GPIO_TogglePin() APIs to allow multi Pin’s toggling.</li>
<li>Updated HAL_GPIO_Init() API to avoid the configuration of PUPDR register when Analog mode is selected.</li>
</ul></li>
<li><strong>HAL/LL RCC</strong> update
<ul>
<li>Updated HAL_RCC_OscConfig() API to add missing checks and to don’t return HAL_ERROR if request repeats the current PLL configuration.</li>
<li>Updated IS_RCC_PLLN_VALUE(VALUE) macro in case of STM32F411xE device in order to be aligned with reference manual.</li>
</ul></li>
<li><strong>HAL SD</strong> update
<ul>
<li>Update function SD_FindSCR() to resolve issue of FIFO blocking when reading.</li>
<li>Update read/write functions in DMA mode in order to force the DMA direction, updated functions:
<ul>
<li>HAL_SD_ReadBlocks_DMA()</li>
<li>HAL_SD_WriteBlocks_DMA()</li>
</ul></li>
<li>Add the block size settings in the initialization functions and remove it from read/write transactions to avoid repeated and inefficient reconfiguration, updated functions:
<ul>
<li>HAL_SD_InitCard()</li>
<li>HAL_SD_GetCardStatus()</li>
<li>HAL_SD_ConfigWideBusOperation()</li>
<li>HAL_SD_ReadBlocks()</li>
<li>HAL_SD_WriteBlocks()</li>
<li>HAL_SD_ReadBlocks_IT()</li>
<li>HAL_SD_WriteBlocks_IT()</li>
<li>HAL_SD_ReadBlocks_DMA()</li>
<li>HAL_SD_WriteBlocks_DMA()</li>
</ul></li>
</ul></li>
<li><strong>HAL MMC</strong> update
<ul>
<li>Add the block size settings in the initialization function and remove it from read/write transactions to avoid repeated and inefficient reconfiguration, updated functions:
<ul>
<li>HAL_MMC_InitCard()</li>
<li>HAL_MMC_ReadBlocks()</li>
<li>HAL_MMC_WriteBlocks()</li>
<li>HAL_MMC_ReadBlocks_IT()</li>
<li>HAL_MMC_WriteBlocks_IT()</li>
<li>HAL_MMC_ReadBlocks_DMA()</li>
<li>HAL_MMC_WriteBlocks_DMA()</li>
</ul></li>
<li>Update read/write functions in DMA mode in order to force the DMA direction, updated functions:
<ul>
<li>HAL_MMC_ReadBlocks_DMA()</li>
<li>HAL_MMC_WriteBlocks_DMA()</li>
</ul></li>
<li>Deploy new functions MMC_ReadExtCSD() and SDMMC_CmdSendEXTCSD () that read and check the sectors number of the device in order to resolve the issue of wrongly reading big memory size.</li>
</ul></li>
<li><strong>HAL NAND</strong> update
<ul>
<li>Update functions HAL_NAND_Read_SpareArea_16b() and HAL_NAND_Write_SpareArea_16b() to fix column address calculation issue.</li>
</ul></li>
<li><strong>LL SDMMC</strong> update
<ul>
<li>Update the definition of SDMMC_DATATIMEOUT constant in order to allow the user to redefine it in his proper application.</li>
<li>Remove ‘register’ storage class specifier from LL SDMMC driver.</li>
<li>Deploy new functions MMC_ReadExtCSD() and SDMMC_CmdSendEXTCSD () that read and check the sectors number of the device in order to resolve the issue of wrongly reading big memory size.</li>
</ul></li>
<li><strong>HAL SMBUS</strong> update
<ul>
<li>Support for Fast Mode Plus to be SMBUS rev 3 compliant.</li>
<li>Added HAL_FMPSMBUSEx_EnableFastModePlus() and HAL_FMPSMBUSEx_DisableFastModePlus() APIs to manage Fm+.</li>
<li>Updated SMBUS_MasterTransmit_BTF() , SMBUS_MasterTransmit_TXE() and SMBUS_MasterReceive_BTF() APIs to allow stop generation when CurrentXferOptions is different from SMBUS_FIRST_FRAME and SMBUS_NEXT_FRAME.</li>
<li>Updated SMBUS_ITError() API to correct the twice call of HAL_SMBUS_ErrorCallback.</li>
</ul></li>
<li><strong>HAL SPI</strong> update
<ul>
<li>Updated HAL_SPI_Init() API
<ul>
<li>To avoid setting the BaudRatePrescaler in case of Slave Motorola Mode.</li>
<li>Use the bit-mask for SPI configuration.</li>
</ul></li>
<li>Updated Transmit/Receive processes in half-duplex mode
<ul>
<li>Disable the SPI instance before setting BDIOE bit.</li>
</ul></li>
<li>Fixed wrong timeout management</li>
<li>Calculate Timeout based on a software loop to avoid blocking issue if Systick is disabled.</li>
</ul></li>
<li><strong>HAL SPDIFRX</strong> update
<ul>
<li>Remove ‘register’ storage class specifier from HAL SPDIFRX driver.</li>
</ul></li>
<li><strong>HAL I2S</strong> update
<ul>
<li>Updated I2SEx APIs to correctly support circular transfers
<ul>
<li>Updated I2SEx_TxRxDMACplt() API to manage DMA circular mode.</li>
</ul></li>
<li>Updated HAL_I2SEx_TransmitReceive_DMA() API to set hdmatx (transfer callback and half) to NULL.</li>
</ul></li>
<li><strong>HAL SAI</strong> update
<ul>
<li>Updated to avoid the incorrect left/right synchronization.
<ul>
<li>Updated HAL_SAI_Transmit_DMA() API to follow the sequence described in the reference manual for slave transmitter mode.</li>
</ul></li>
<li>Updated HAL_SAI_Init() API to correct the formula in case of SPDIF is wrong.</li>
</ul></li>
<li><strong>HAL CRYP</strong> update
<ul>
<li>Updated HAL_CRYP_SetConfig() and HAL_CRYP_GetConfig() APIs to set/get the continent of KeyIVConfigSkip correctly.</li>
</ul></li>
<li><strong>HAL EXTI</strong> update
<ul>
<li>__EXTI_LINE__ is now used instead of __LINE__ which is a standard C macro.</li>
</ul></li>
<li><strong>HAL DCMI</strong>
<ul>
<li>Support of HAL callback registration feature for DCMI extended driver.</li>
</ul></li>
<li><strong>HAL/LL TIM</strong> update
<ul>
<li>Updated HAL_TIMEx_OnePulseN_Start() and HAL_TIMEx_OnePulseN_Stop() APIs (pooling and IT mode) to take into consideration all OutputChannel parameters.</li>
<li>Corrected reversed description of TIM_LL_EC_ONEPULSEMODE One Pulse Mode.</li>
<li>Updated LL_TIM_GetCounterMode() API to return the correct counter mode.</li>
</ul></li>
<li><strong>HAL/LL SMARTCARD</strong> update
<ul>
<li>Fixed invalid initialization of SMARTCARD configuration by removing FIFO mode configuration as it is not member of SMARTCARD_InitTypeDef Structure.</li>
<li>Fixed typos in SMARTCARD State definition description</li>
</ul></li>
<li><strong>HAL/LL IRDA</strong> update
<ul>
<li>Fixed typos in IRDA State definition description</li>
</ul></li>
<li><strong>LL USART</strong> update
<ul>
<li>Remove useless check on maximum BRR value by removing IS_LL_USART_BRR_MAX() macro.</li>
<li>Update USART polling and interruption processes to fix issues related to accesses out of user specified buffer.</li>
</ul></li>
<li><strong>HAL USB</strong> update
<ul>
<li>Enhanced USB OTG host HAL with USB DMA is enabled:
<ul>
<li>fixed ping and data toggle issue,</li>
<li>reworked Channel error report management</li>
</ul></li>
</ul></li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section26" aria-hidden="true"> <label for="collapse-section26" aria-hidden="true">V1.7.10 / 22-October-2020</label>
<div>
<h2 id="main-changes-7">Main Changes</h2>
<ul>
<li>General updates to fix known defects.</li>
<li><strong>HAL/LL I2C</strong> update
<ul>
<li>Update to fix hardfault issue with HAL_I2C_Mem_Write_DMA() API:
<ul>
<li>Abort the right ongoing DMA transfer when memory write access request operation failed: fix typo “hdmarx” replaced by “hdmatx”</li>
</ul></li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section25" aria-hidden="true"> <label for="collapse-section25" aria-hidden="true">V1.7.9 / 14-August-2020</label>
<div>
<h2 id="main-changes-8">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation</li>
<li><strong>HAL/LL I2C</strong> update
<ul>
<li>Update HAL_I2C_ER_IRQHandler() API to fix acknowledge failure issue with I2C memory IT processes
<ul>
<li>Add stop condition generation when NACK occurs.</li>
</ul></li>
<li>Update I2C_DMAXferCplt(), I2C_DMAError() and I2C_DMAAbort() APIs to fix hardfault issue when hdmatx and hdmarx parameters in i2c handle aren’t initialized (NULL pointer).
<ul>
<li>Add additional check on hi2c-&gt;hdmtx and hi2c-&gt;hdmarx before resetting DMA Tx/Rx complete callbacks</li>
</ul></li>
<li>Update Sequential transfer APIs to adjust xfermode condition.
<ul>
<li>Replace hi2c-&gt;XferCount &lt; MAX_NBYTE_SIZE by hi2c-&gt;XferCount &lt;= MAX_NBYTE_SIZE which corresponds to a case without reload</li>
</ul></li>
</ul></li>
<li><strong>HAL/LL USB</strong> update
<ul>
<li>Bug fix: USB_ReadPMA() and USB_WritePMA() by ensuring 16-bits access to USB PMA memory</li>
<li>Bug fix: correct USB RX count calculation</li>
<li>Fix USB Bulk transfer double buffer mode</li>
<li>Remove register keyword from USB defined macros as no more supported by C++ compiler</li>
<li>Minor rework on USBD_Start() and USBD_Stop() APIs: stopping device will be handled by HAL_PCD_DeInit() API.</li>
<li>Remove non used API for USB device mode.</li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section24" aria-hidden="true"> <label for="collapse-section24" aria-hidden="true">V1.7.8 / 12-February-2020</label>
<div>
<h2 id="main-changes-9">Main Changes</h2>
<ul>
<li>Add new <strong>HAL FMPSMBUS</strong> and <strong>LL FMPI2C</strong> drivers</li>
<li>General updates to fix known defects and enhancements implementation</li>
<li>Update HAL CRYP driver to support block by block decryption without reinitializes the IV and KEY for each call.</li>
<li>Improve code quality by fixing MisraC-2012 violations</li>
<li><strong>HAL/LL USB</strong> update
<ul>
<li>Add handling USB host babble error interrupt</li>
<li>Fix Enabling ULPI interface for platforms that integrates USB HS PHY</li>
<li>Fix Host data toggling for IN Iso transfers</li>
<li>Ensure to disable USB EP during endpoint deactivation</li>
</ul></li>
<li><strong>HAL CRYP</strong> update
<ul>
<li>Update HAL CRYP driver to support block by block decryption without initializing the IV and KEY at each call.
<ul>
<li>Add new CRYP Handler parameters: “KeyIVConfig” and “SizesSum”</li>
<li>Add new CRYP init parameter: "KeyIVConfigSkip</li>
</ul></li>
</ul></li>
<li><strong>HAL I2S</strong> update
<ul>
<li>Update HAL_I2S_DMAStop() API to be more safe
<ul>
<li>Add a check on BSY, TXE and RXNE flags before disabling the I2S</li>
</ul></li>
<li>Update HAL_I2S_DMAStop() API to fix multi-call transfer issue(to avoid re-initializing the I2S for the next transfer).
<ul>
<li>Add __HAL_I2SEXT_FLUSH_RX_DR() and __HAL_I2S_FLUSH_RX_DR() macros to flush the remaining data inside DR registers.</li>
<li>Add new ErrorCode define: HAL_I2S_ERROR_BUSY_LINE_RX</li>
</ul></li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section23" aria-hidden="true"> <label for="collapse-section23" aria-hidden="true">V1.7.7 / 06-December-2019</label>
<div>
<h2 id="main-changes-10">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation</li>
<li><strong>HAL Generic</strong> update
<ul>
<li>HAL_SetTickFreq(): update to restore the previous tick frequency when HAL_InitTick() configuration failed.</li>
</ul></li>
<li><strong>HAL/LL GPIO</strong> update
<ul>
<li>Update GPIO initialization sequence to avoid unwanted pulse on GPIO Pin’s</li>
</ul></li>
<li><strong>HAL EXTI</strong> update
<ul>
<li>General update to enhance HAL EXTI driver robustness
<ul>
<li>Add additional assert check on EXTI config lines</li>
<li>Update to compute EXTI line mask before read/write access to EXTI registers</li>
</ul></li>
<li>Update EXTI callbacks management to be compliant with reference manual: only one PR register for rising and falling interrupts.
<ul>
<li>Update parameters in EXTI_HandleTypeDef structure: merge HAL EXTI RisingCallback and FallingCallback in only one PendingCallback</li>
<li>Remove HAL_EXTI_RISING_CB_ID and HAL_EXTI_FALLING_CB_ID values from EXTI_CallbackIDTypeDef enumeration.</li>
</ul></li>
<li>Update HAL_EXTI_IRQHandler() API to serve interrupts correctly.
<ul>
<li>Update to compute EXTI line mask before handle EXTI interrupt.</li>
</ul></li>
<li>Update to support GPIO port interrupts:
<ul>
<li>Add new “GPIOSel” parameter in EXTI_ConfigTypeDef structure</li>
</ul></li>
</ul></li>
<li><strong>HAL/LL RCC</strong> update
<ul>
<li>Update HAL_RCCEx_PeriphCLKConfig() API to support PLLI2S configuration for STM32F42xxx and STM32F43xxx devices</li>
<li>Update the HAL_RCC_ClockConfig() and HAL_RCC_DeInit() API to don’t overwrite the custom tick priority</li>
<li>Fix LL_RCC_DeInit() failure detected with gcc compiler and high optimization level is selected(-03)</li>
<li>Update HAL_RCC_OscConfig() API to don’t return HAL_ERROR if request repeats the current PLL configuration</li>
</ul></li>
<li><strong>HAL ADC</strong> update
<ul>
<li>Update LL_ADC_REG_Init() to fix wrong ADC CR1 register configuration
<ul>
<li>The ADC sequencer length is part of ADC SQR1 register not of ADC CR1 register</li>
</ul></li>
</ul></li>
<li><strong>HAL CRYP</strong> update
<ul>
<li>Update HAL_CRYP_Encrypt() and HAL_CRYP_Decrypt() APIs to take into consideration the datatype fed to the DIN register (1-, 8-, 16-, or 32-bit data) when padding the last block of the payload, in case the size of this last block is less than 128 bits.</li>
</ul></li>
<li><strong>HAL RNG</strong> update
<ul>
<li>Update HAL_RNG_IRQHandler() API to fix error code management issue: error code is assigned “HAL_RNG_ERROR_CLOCK” in case of clock error and “HAL_RNG_ERROR_SEED” in case of seed error, not the opposite.</li>
</ul></li>
<li><strong>HAL DFSDM</strong> update
<ul>
<li>Update DFSDM_GetChannelFromInstance() API to remove unreachable check condition</li>
</ul></li>
<li><strong>HAL DMA</strong> update
<ul>
<li>Update HAL_DMA_Start_IT() API to omit the FIFO error</li>
</ul></li>
<li><strong>HAL FLASH</strong> update
<ul>
<li>Update FLASH_Program_DoubleWord() API to fix with EWARM high level optimization issue</li>
</ul></li>
<li><strong>HAL QSPI</strong> update
<ul>
<li>Remove Lock mechanism from HAL_QSPI_Init() and HAL_QSPI_DeInit() APIs</li>
</ul></li>
<li><strong>HAL HASH</strong> update
<ul>
<li>Null pointer on handler “hhash” is now checked <strong>before</strong> accessing structure member “hhash-&gt;Init.DataType” in the following API:
<ul>
<li>HAL_HASH_Init()</li>
</ul></li>
<li>Following <strong>interrupt-based</strong> APIs have been added. Interrupt mode could allow the MCU to enter “Sleep” mode while a data block is being processed. Please refer to the “##### How to use this driver #####” section for details about their use.
<ul>
<li>HAL_HASH_SHA1_Accmlt_IT()</li>
<li>HAL_HASH_MD5_Accmlt_IT()</li>
<li>HAL_HASHEx_SHA224_Accmlt_IT()</li>
<li>HAL_HASHEx_SHA256_Accmlt_IT()</li>
</ul></li>
<li>Following <strong>aliases</strong> have been added (just <strong>for clarity sake</strong>) as they shall be used at the <strong>end</strong> of the computation of a multi-buffers message and not at the start:
<ul>
<li>HAL_HASH_SHA1_Accmlt_End() to be used instead of HAL_HASH_SHA1_Start()</li>
<li>HAL_HASH_MD5_Accmlt_End() to be used instead of HAL_HASH_MD5_Start()</li>
<li>HAL_HASH_SHA1_Accmlt_End_IT() to be used instead of HAL_HASH_SHA1_Start_IT()</li>
<li>HAL_HASH_MD5_Accmlt_End_IT() to be used instead of HAL_HASH_MD5_Start_IT()</li>
<li>HAL_HASHEx_SHA224_Accmlt_End() to be used instead of HAL_HASHEx_SHA224_Start()</li>
<li>HAL_HASHEx_SHA256_Accmlt_End() to be used instead of HAL_HASHEx_SHA256_Start()</li>
<li>HAL_HASHEx_SHA224_Accmlt_End_IT() to be used instead of HAL_HASHEx_SHA224_Start_IT()</li>
<li>HAL_HASHEx_SHA256_Accmlt_End_IT() to be used instead of HAL_HASHEx_SHA256_Start_IT()</li>
</ul></li>
<li>MISRAC-2012 rule R.5.1 (identifiers shall be distinct in the first 31 characters) constrained the naming of the above listed aliases (e.g. HAL_HASHEx_SHA256_<strong>Accmlt</strong>_End() could not be named HAL_HASHEx_SHA256_<strong>Accumulate</strong>_End(). Otherwise the name would have conflicted with HAL_HASHEx_SHA256_<strong>Accumulate</strong>_End_IT()). In order to have aligned names following APIs have been renamed:
<ul>
<li>HAL_HASH_MD5_Accumulate() renamed HAL_HASH_MD5_Accmlt()</li>
<li>HAL_HASH_SHA1_Accumulate() renamed HAL_HASH_SHA1_Accmlt()</li>
<li>HAL_HASHEx_SHA224_Accumulate() renamed HAL_HASHEx_SHA224_Accmlt()</li>
<li>HAL_HASHEx_SHA256_Accumulate() renamed HAL_HASHEx_SHA256_Accmlt()</li>
</ul></li>
<li>HASH handler state is no more reset to HAL_HASH_STATE_READY <strong>once DMA has been started</strong> in the following APIs:
<ul>
<li>HAL_HASH_MD5_Start_DMA()</li>
<li>HAL_HMAC_MD5_Start_DMA()</li>
<li>HAL_HASH_SHA1_Start_DMA()</li>
<li>HAL_HMAC_SHA1_Start_DMA()</li>
</ul></li>
<li>HASH phase state is now set to HAL_HASH_PHASE_READY <strong>once the digest has been read</strong> in the following APIs:
<ul>
<li>HASH_IT()</li>
<li>HMAC_Processing()</li>
<li>HASH_Start()</li>
<li>HASH_Finish()</li>
</ul></li>
<li>Case of a large buffer scattered around in memory each piece of which is <strong>not</strong> necessarily a <strong>multiple of 4</strong> bytes in length.
<ul>
<li>In section “##### How to use this driver #####”, sub-section "*** Remarks on message length ***" added to provide recommendations to follow in such case.</li>
<li>No modification of the driver as the root-cause is at design-level.</li>
</ul></li>
</ul></li>
<li><strong>HAL CAN</strong> update
<ul>
<li>HAL_CAN_GetRxMessage() update to get the correct value for the RTR (type of frame for the message that will be transmitted) field in the CAN_RxHeaderTypeDef structure.</li>
</ul></li>
<li><strong>HAL DCMI</strong> update
<ul>
<li>Add new HAL_DCMI_ConfigSyncUnmask() API to set embedded synchronization delimiters unmasks.</li>
</ul></li>
<li><strong>HAL RTC</strong> update
<ul>
<li>Following IRQ handlers’ implementation has been aligned with the STM32Cube firmware specification (in case of interrupt lines shared by multiple events, first check the IT enable bit is set then check the IT flag is set too):
<ul>
<li>HAL_RTC_AlarmIRQHandler()</li>
<li>HAL_RTCEx_WakeUpTimerIRQHandler()</li>
<li>HAL_RTCEx_TamperTimeStampIRQHandler()</li>
</ul></li>
</ul></li>
<li><strong>HAL WWDG</strong> update
<ul>
<li>In “##### WWDG Specific features #####” descriptive comment section:
<ul>
<li>Maximal prescaler value has been corrected (8 instead of 128).</li>
<li>Maximal APB frequency has been corrected (42MHz instead of 56MHz) and possible timeout values updated.</li>
</ul></li>
</ul></li>
<li><strong>HAL DMA2D</strong> update
<ul>
<li>Add the following API’s to Start DMA2D CLUT Loading.
<ul>
<li>HAL_DMA2D_CLUTStartLoad() Start DMA2D CLUT Loading.</li>
<li>HAL_DMA2D_CLUTStartLoad_IT() Start DMA2D CLUT Loading with interrupt enabled.</li>
</ul></li>
<li>The following old wrong services will be kept in the HAL DCMI driver for legacy purpose and a specific Note is added:
<ul>
<li>HAL_DMA2D_CLUTLoad() can be replaced with HAL_DMA2D_CLUTStartLoad()</li>
<li>HAL_DMA2D_CLUTLoad_IT() can be replaced with HAL_DMA2D_CLUTStartLoad_IT()</li>
<li>HAL_DMA2D_ConfigCLUT() can be omitted as the config can be performed using the HAL_DMA2D_CLUTStartLoad() API.</li>
</ul></li>
</ul></li>
<li><strong>HAL SDMMC</strong> update
<ul>
<li>Fix typo in “FileFormatGroup” parameter in the HAL_MMC_CardCSDTypeDef and HAL_SD_CardCSDTypeDef structures</li>
<li>Fix an improve handle state and error management</li>
<li>Rename the defined MMC card capacity type to be more meaningful:
<ul>
<li>Update <strong>MMC_HIGH_VOLTAGE_CARD</strong> to <strong>MMC LOW_CAPACITY_CARD</strong></li>
<li>Update <strong>MMC_DUAL_VOLTAGE_CRAD</strong> to <strong>MMC_HIGH_CAPACITY_CARD</strong></li>
</ul></li>
<li>Fix management of peripheral flags depending on commands or data transfers
<ul>
<li>Add new defines “SDIO_STATIC_CMD_FLAGS” and “SDIO_STATIC_DATA_FLAGS”</li>
<li>Updates HAL SD and HAL MMC drivers to manage the new SDIO static flags.</li>
</ul></li>
<li>Due to limitation SDIO hardware flow control indicated in Errata Sheet:
<ul>
<li>In 4-bits bus wide mode, do not use the HAL_SD_WriteBlocks_IT() or HAL_SD_WriteBlocks() APIs otherwise underrun will occur and it isn’t possible to activate the flow control.</li>
<li>Use DMA mode when using 4-bits bus wide mode or decrease the SDIO_CK frequency.</li>
</ul></li>
</ul></li>
<li><strong>HAL UART</strong> update
<ul>
<li>Update UART polling processes to handle efficiently the Lock mechanism
<ul>
<li>Move the process unlock at the top of the HAL_UART_Receive() and HAL_UART_Transmit() API.</li>
</ul></li>
<li>Fix baudrate calculation error for clock higher than 172Mhz
<ul>
<li>Add a forced cast on UART_DIV_SAMPLING8() and UART_DIV_SAMPLING16() macros.</li>
<li>Remove useless parenthesis from UART_DIVFRAQ_SAMPLING8(), UART_DIVFRAQ_SAMPLING16(), UART_BRR_SAMPLING8() and UART_BRR_SAMPLING16() macros to solve some MISRA warnings.</li>
</ul></li>
<li>Update UART interruption handler to manage correctly the overrun interrupt
<ul>
<li>Add in the HAL_UART_IRQHandler() API a check on USART_CR1_RXNEIE bit when an overrun interrupt occurs.</li>
</ul></li>
<li>Fix baudrate calculation error UART9 and UART10
<ul>
<li>In UART_SetConfig() API fix UART9 and UART10 clock source when computing baudrate values by adding a check on these instances and setting clock sourcePCLK2 instead of PCLK1.</li>
</ul></li>
<li>Update UART_SetConfig() API
<ul>
<li>Split HAL_RCC_GetPCLK1Freq() and HAL_RCC_GetPCLK2Freq() macros from the UART_BRR_SAMPLING8() and UART_BRR_SAMPLING8() macros</li>
</ul></li>
</ul></li>
<li><strong>HAL USART</strong> update
<ul>
<li>Fix baudrate calculation error for clock higher than 172Mhz
<ul>
<li>Add a forced cast on USART_DIV() macro.</li>
<li>Remove useless parenthesis from USART_DIVFRAQ() macro to solve some MISRA warnings.</li>
</ul></li>
<li>Update USART interruption handler to manage correctly the overrun interrupt
<ul>
<li>Add in the HAL_USART_IRQHandler() API a check on USART_CR1_RXNEIE bit when an overrun interrupt occurs.</li>
</ul></li>
<li>Fix baudrate calculation error UART9 and UART10
<ul>
<li>In USART_SetConfig() API fix UART9 and UART10 clock source when computing baudrate values by adding a check on these instances and setting clock sourcePCLK2 instead of PCLK1.</li>
</ul></li>
<li>Update USART_SetConfig() API
<ul>
<li>Split HAL_RCC_GetPCLK1Freq() and HAL_RCC_GetPCLK2Freq() macros from the USART_BRR() macro</li>
</ul></li>
</ul></li>
<li><strong>HAL IRDA</strong> update
<ul>
<li>Fix baudrate calculation error for clock higher than 172Mhz
<ul>
<li>Add a forced cast on IRDA_DIV() macro.</li>
<li>Remove useless parenthesis from IRDA_DIVFRAQ() macro to solve some MISRA warnings.</li>
</ul></li>
<li>Update IRDA interruption handler to manage correctly the overrun interrupt
<ul>
<li>Add in the HAL_IRDA_IRQHandler() API a check on USART_CR1_RXNEIE bit when an overrun interrupt occurs.</li>
</ul></li>
<li>Fix baudrate calculation error UART9 and UART10
<ul>
<li>In IRDA_SetConfig() API fix UART9 and UART10 clock source when computing baudrate values by adding a check on these instances and setting clock sourcePCLK2 instead of PCLK1.</li>
</ul></li>
<li>Update IRDA_SetConfig() API
<ul>
<li>Split HAL_RCC_GetPCLK1Freq() and HAL_RCC_GetPCLK2Freq() macros from the IRDA_BRR() macro</li>
</ul></li>
</ul></li>
<li><strong>HAL SMARTCARD</strong> update
<ul>
<li>Fix baudrate calculation error for clock higher than 172Mhz
<ul>
<li>Add a forced cast on SMARTCARD_DIV() macro.</li>
<li>Remove useless parenthesis from SMARTCARD_DIVFRAQ() macro to solve some MISRA warnings.</li>
</ul></li>
<li>Update SMARTCARD interruption handler to manage correctly the overrun interrupti
<ul>
<li>Add in the HAL_SMARTCARD_IRQHandler() API a check on USART_CR1_RXNEIE bit when an overrun interrupt occurs.</li>
</ul></li>
<li>Update SMARTCARD_SetConfig() API
<ul>
<li>Split HAL_RCC_GetPCLK1Freq() and HAL_RCC_GetPCLK2Freq() macros from the SMARTCARD_BRR() macro</li>
</ul></li>
</ul></li>
<li><strong>HAL TIM</strong> update
<ul>
<li>Add new macros to enable and disable the fast mode when using the one pulse mode to output a waveform with a minimum delay
<ul>
<li>__HAL_TIM_ENABLE_OCxFAST() and __HAL_TIM_DISABLE_OCxFAST().</li>
</ul></li>
<li>Update Encoder interface mode to keep TIM_CCER_CCxNP bits low
<ul>
<li>Add TIM_ENCODERINPUTPOLARITY_RISING and TIM_ENCODERINPUTPOLARITY_FALLING definitions to determine encoder input polarity.</li>
<li>Add IS_TIM_ENCODERINPUT_POLARITY() macro to check the encoder input polarity.</li>
<li>Update HAL_TIM_Encoder_Init() API
<ul>
<li>Replace IS_TIM_IC_POLARITY() macro by IS_TIM_ENCODERINPUT_POLARITY() macro.</li>
</ul></li>
</ul></li>
<li>Update TIM remapping input configuration in HAL_TIMEx_RemapConfig() API
<ul>
<li>Remove redundant check on LPTIM_OR_TIM5_ITR1_RMP bit and replace it by check on LPTIM_OR_TIM9_ITR1_RMP bit.</li>
</ul></li>
<li>Update HAL_TIMEx_MasterConfigSynchronization() API to avoid functional errors and assert fails when using some TIM instances as input trigger.
<ul>
<li>Replace IS_TIM_SYNCHRO_INSTANCE() macro by IS_TIM_MASTER_INSTANCE() macro.</li>
<li>Add IS_TIM_SLAVE_INSTANCE() macro to check on TIM_SMCR_MSM bit.</li>
</ul></li>
<li>Add lacking TIM input remapping definition
<ul>
<li>Add LL_TIM_TIM11_TI1_RMP_SPDIFRX and LL_TIM_TIM2_ITR1_RMP_ETH_PTP.</li>
<li>Add lacking definition for linked LPTIM_TIM input trigger remapping
<ul>
<li>Add following definitions : LL_TIM_TIM9_ITR1_RMP_TIM3_TRGO, LL_TIM_TIM9_ITR1_RMP_LPTIM, LL_TIM_TIM5_ITR1_RMP_TIM3_TRGO, LL_TIM_TIM5_ITR1_RMP_LPTIM, LL_TIM_TIM1_ITR2_RMP_TIM3_TRGO and LL_TIM_TIM1_ITR2_RMP_LPTIM.</li>
<li>Add a new mechanism in LL_TIM_SetRemap() API to remap TIM1, TIM9, and TIM5 input triggers mapped on LPTIM register.</li>
</ul></li>
</ul></li>
</ul></li>
<li><strong>HAL LPTIM</strong> update
<ul>
<li>Add a polling mechanism to check on LPTIM_FLAG_XXOK flags in different API
<ul>
<li>Add LPTIM_WaitForFlag() API to wait for flag set.</li>
<li>Perform new checks on HAL_LPTIM_STATE_TIMEOUT.</li>
</ul></li>
<li>Add lacking definitions of LPTIM input trigger remapping and its related API
<ul>
<li>LL_LPTIM_INPUT1_SRC_PAD_AF, LL_LPTIM_INPUT1_SRC_PAD_PA4, LL_LPTIM_INPUT1_SRC_PAD_PB9 and LL_LPTIM_INPUT1_SRC_TIM_DAC.</li>
<li>Add a new API LL_LPTIM_SetInput1Src() to access to the LPTIM_OR register and remap the LPTIM input trigger.</li>
</ul></li>
<li>Perform a new check on indirect EXTI23 line associated to the LPTIM wake up timer
<ul>
<li>Condition the use of the LPTIM Wake-up Timer associated EXTI line configuration’s macros by EXTI_IMR_MR23 bit in different API :
<ul>
<li>__HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE/DDISABLE_FALLING_EDGE()</li>
<li>__HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE()</li>
<li>__HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE()</li>
<li>__HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE()</li>
<li>__HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_FALLING_EDGE()</li>
<li>__HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_FALLING_EDGE()</li>
<li>__HAL_LPTIM_WAKEUPTIMER_EXTI_GET_FLAG()</li>
<li>__HAL_LPTIM_WAKEUPTIMER_EXTI_CLEAR_FLAG()</li>
<li>__HAL_LPTIM_WAKEUPTIMER_EXTI_GENERATE_SWIT()</li>
</ul></li>
<li>Update HAL_LPTIM_TimeOut_Start_IT(), HAL_LPTIM_TimeOut_Stop_IT(), HAL_LPTIM_Counter_Start_IT() and HAL_LPTIM_Counter_Stop_IT() API by adding Enable/Disable rising edge trigger on the LPTIM Wake-up Timer Exti line.</li>
<li>Add __HAL_LPTIM_WAKEUPTIMER_EXTI_CLEAR_FLAG() in the end of the HAL_LPTIM_IRQHandler() API conditioned by EXTI_IMR_MR23 bit.</li>
</ul></li>
</ul></li>
<li><strong>HAL I2C</strong> update
<ul>
<li>Update HAL_I2C_EV_IRQHandler() API to fix I2C send break issue
<ul>
<li>Add additional check on hi2c-&gt;hdmatx, hdmatx-&gt;XferCpltCallback, hi2c-&gt;hdmarx, hdmarx-&gt;XferCpltCallback in I2C_Master_SB() API to avoid enabling DMA request when IT mode is used.</li>
</ul></li>
<li>Update HAL_I2C_ER_IRQHandler() API to fix acknowledge failure issue with I2C memory IT processes
<ul>
<li>Add stop condition generation when NACK occurs.</li>
</ul></li>
<li>Update HAL_I2C_Init() API to force software reset before setting new I2C configuration</li>
<li>Update HAL I2C processes to report ErrorCode when wrong I2C start condition occurs
<ul>
<li>Add new ErrorCode define: HAL_I2C_WRONG_START</li>
<li>Set ErrorCode parameter in I2C handle to HAL_I2C_WRONG_START</li>
</ul></li>
<li>Update I2C_DMAXferCplt(), I2C_DMAError() and I2C_DMAAbort() APIs to fix hardfault issue when hdmatx and hdmarx parameters in i2c handle aren’t initialized (NULL pointer).
<ul>
<li>Add additional check on hi2c-&gt;hdmtx and hi2c-&gt;hdmarx before resetting DMA Tx/Rx complete callbacks</li>
</ul></li>
</ul></li>
<li><strong>HAL FMPI2C</strong> update
<ul>
<li>Fix HAL FMPI2C slave interrupt handling issue with I2C sequential transfers.
<ul>
<li>Update FMPI2C_Slave_ISR_IT() and FMPI2C_Slave_ISR_DMA() APIs to check on STOP condition and handle it before clearing the ADDR flag</li>
</ul></li>
</ul></li>
<li><strong>HAL NAND</strong> update
<ul>
<li>Update HAL_NAND_Write_Page_8b(), HAL_NAND_Write_Page_16b() and HAL_NAND_Write_SpareArea_16b() to manage correctly the time out condition.</li>
</ul></li>
<li><strong>HAL SAI</strong> update
<ul>
<li>Optimize SAI_DMATxCplt() and SAI_DMARxCplt() APIs to check on “Mode” parameter instead of CIRC bit in the CR register.</li>
<li>Remove unused SAI_FIFO_SIZE define</li>
<li>Update HAL_SAI_Receive_DMA() programming sequence to be inline with reference manual</li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section22" aria-hidden="true"> <label for="collapse-section22" aria-hidden="true">V1.7.6 / 12-April-2019</label>
<div>
<h2 id="main-changes-11">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation</li>
<li><strong>HAL I2C</strong> update
<ul>
<li>Fix I2C send break issue in IT processes
<ul>
<li>Add additional check on hi2c-&gt;hdmatx and hi2c-&gt;hdmarx to avoid the DMA request enable when IT mode is used.</li>
</ul></li>
</ul></li>
<li><strong>HAL SPI</strong> update
<ul>
<li>Update to implement Erratasheet: BSY bit may stay high at the end of a data transfer in Slave mode</li>
</ul></li>
<li><strong>LL LPTIM</strong> update
<ul>
<li>Fix compilation errors with LL_LPTIM_WriteReg() and LL_LPTIM_ReadReg() macros</li>
</ul></li>
<li><strong>HAL SDMMC</strong> update
<ul>
<li>Fix preprocessing compilation issue with SDIO STA STBITERR interrupt</li>
</ul></li>
<li><strong>HAL/LL USB</strong> update
<ul>
<li>Updated USB_WritePacket(), USB_ReadPacket() APIs to prevent compilation warning with GCC GNU v8.2.0</li>
<li>Rework USB_EPStartXfer() API to enable the USB endpoint before unmasking the TX FiFo empty interrupt in case DMA is not used</li>
<li>USB HAL_HCD_Init() and HAL_PCD_Init() APIs updated to avoid enabling USB DMA feature for OTG FS instance, USB DMA feature is available only on OTG HS Instance</li>
<li>Remove duplicated line in hal_hcd.c header file comment section</li>
<li>Rework USB HAL driver to use instance PCD_SPEED_xxx, HCD_SPEED_xx speeds instead of OTG register Core speed definition during the instance initialization</li>
<li>Software Quality improvement with a fix of CodeSonar warning on PCD_Port_IRQHandler() and HCD_Port_IRQHandler() interrupt handlers</li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section21" aria-hidden="true"> <label for="collapse-section21" aria-hidden="true">V1.7.5 / 08-February-2019</label>
<div>
<h2 id="main-changes-12">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation</li>
<li>General updates to fix CodeSonar compilation warnings</li>
<li>General updates to fix SW4STM32 compilation errors under Linux</li>
<li>General updates to fix the user manual .chm files</li>
<li>Add support of HAL callback registration feature</li>
<li>Add new <strong>HAL EXTI</strong> driver</li>
<li>Add new <strong>HAL SMBUS</strong> driver</li>
<li><strong>The following changes done on the HAL drivers require an update on the application code based on older HAL versions</strong>
<ul>
<li>Rework of HAL CRYP driver <strong>(compatibility break)</strong>
<ul>
<li>HAL CRYP driver has been redesigned with new API’s, to bypass limitations on data Encryption/Decryption management present with previous HAL CRYP driver version.</li>
<li>The new HAL CRYP driver is the recommended version. It is located as usual in Drivers/STM32F4xx_HAL_Driver/Src and Drivers/STM32f4xx_HAL_Driver/Inc folders. It can be enabled through switch HAL_CRYP_MODULE_ENABLED in stm32f4xx_hal_conf.h</li>
<li>The legacy HAL CRYP driver is no longer supported.</li>
</ul></li>
<li>Add new AutoReloadPreload field in TIM_Base_InitTypeDef structure to allow the possibilities to enable or disable the TIM Auto Reload Preload.</li>
</ul></li>
<li><strong>HAL/LL Generic</strong> update
<ul>
<li>Add support of <strong>HAL callback registration</strong> feature
<ul>
<li>The feature disabled by default is available for the following HAL drivers:
<ul>
<li><strong>ADC, CAN, CEC, CRYP, DAC, DCMI, DFSDM, DMA2D, DSI, ETH, HASH, HCD, I2C, FMPI2C, SMBUS, UART, USART, IRDA, SMARTCARD, LPTIM, LTDC, MMC, NAND, NOR, PCCARD, PCD, QSPI, RNG, RTC, SAI, SD, SDRAM, SRAM, SPDIFRX, SPI, I2S, TIM,</strong> and <strong>WWDG</strong></li>
</ul></li>
<li>The feature may be enabled individually per HAL PPP driver by setting the corresponding definition USE_HAL_PPP_REGISTER_CALLBACKS to 1U in stm32f4xx_hal_conf.h project configuration file (template file stm32f4xx_hal_conf_template.h available from Drivers/STM32F4xx_HAL_Driver/Inc)</li>
<li>Once enabled , the user application may resort to HAL_PPP_RegisterCallback() to register specific callback function(s) and unregister it(them) with HAL_PPP_UnRegisterCallback().</li>
</ul></li>
<li>General updates to fix MISRA 2012 compilation errors
<ul>
<li>Replace HAL_GetUID() API by HAL_GetUIDw0(), HAL_GetUIDw1() and HAL_GetUIDw2()</li>
<li>HAL_IS_BIT_SET()/HAL_IS_BIT_CLR() macros implementation update</li>
<li>“stdio.h” include updated with “stddef.h”</li>
</ul></li>
</ul></li>
<li><strong>HAL GPIO</strong> update
<ul>
<li>Add missing define for SPI3 alternate function “GPIO_AF5_SPI3” for STM32F401VE devices</li>
<li>Remove “GPIO_AF9_TIM14” from defined alternate function list for STM32F401xx devices</li>
<li>HAL_GPIO_TogglePin() reentrancy robustness improvement</li>
<li>HAL_GPIO_DeInit() API update to avoid potential pending interrupt after call</li>
<li>Update GPIO_GET_INDEX() API for more compliance with STM32F412Vx/STM32F412Rx/STM32F412Cx devices</li>
<li>Update GPIO_BRR registers with Reference Manual regarding registers and bit definition values</li>
</ul></li>
<li><strong>HAL CRYP</strong> update
<ul>
<li><strong>The CRYP_InitTypeDef</strong> is no more supported, changed by <strong>CRYP_ConfigTypedef</strong> to allow changing parameters using HAL_CRYP_setConfig() API without reinitialize the CRYP IP using the HAL_CRYP_Init() API</li>
<li>New parameters added in the <strong>CRYP_ConfigTypeDef</strong> structure: <strong>B0</strong> and <strong>DataWidthUnit</strong></li>
<li>Input data size parameter is added in the <strong>CRYP_HandleTypeDef</strong> structure</li>
<li>Add new APIs to manage the CRYP configuration:
<ul>
<li>HAL_CRYP_SetConfig()</li>
<li>HAL_CRYP_GetConfig()</li>
</ul></li>
<li>Add new APIs to manage the Key derivation:
<ul>
<li>HAL_CRYPEx_EnableAutoKeyDerivation()</li>
<li>HAL_CRYPEx_DisableAutoKeyDerivation()</li>
</ul></li>
<li>Add new APIs to encrypt and decrypt data:
<ul>
<li>HAL_CRYP_Encypt()</li>
<li>HAL_CRYP_Decypt()</li>
<li>HAL_CRYP_Encypt_IT()</li>
<li>HAL_CRYP_Decypt_IT()</li>
<li>HAL_CRYP_Encypt_DMA()</li>
<li>HAL_CRYP_Decypt_DMA()</li>
</ul></li>
<li>Add new APIs to generate TAG:
<ul>
<li>HAL_CRYPEx_AES__GCM___GenerateAuthTAG()</li>
<li>HAL_CRYPEx_AES__CCM___Generago teAuthTAG()</li>
</ul></li>
</ul></li>
<li><strong>HAL LPTIM</strong> update
<ul>
<li>Remove useless LPTIM Wakeup EXTI related macros from HAL_LPTIM_TimeOut_Start_IT() API</li>
</ul></li>
<li><strong>HAL I2C</strong> update
<ul>
<li>I2C API changes for MISRA-C 2012 compliance:
<ul>
<li>Rename HAL_I2C_Master_Sequential_Transmit_IT() to HAL_I2C_Master_Seq_Transmit_IT()</li>
<li>Rename HAL_I2C_Master_Sequentiel_Receive_IT() to HAL_I2C_Master_Seq_Receive_IT()</li>
<li>Rename HAL_I2C_Slave_Sequentiel_Transmit_IT() to HAL_I2C_Slave_Seq_Transmit_IT()</li>
<li>Rename HAL_I2C_Slave_Sequentiel_Receive_DMA() to HAL_I2C_Slave_Seq_Receive_DMA()</li>
</ul></li>
<li>SMBUS defined flags are removed as not used by the HAL I2C driver
<ul>
<li>I2C_FLAG_SMBALERT</li>
<li>I2C_FLAG_TIMEOUT</li>
<li>I2C_FLAG_PECERR</li>
<li>I2C_FLAG_SMBHOST</li>
<li>I2C_FLAG_SMBDEFAULT</li>
</ul></li>
<li>Add support of I2C repeated start feature in DMA Mode:
<ul>
<li>With the following new API’s
<ul>
<li>HAL_I2C_Master_Seq_Transmit_DMA()</li>
<li>HAL_I2C_Master_Seq_Receive_DMA()</li>
<li>HAL_I2C_Slave_Seq_Transmit_DMA()</li>
<li>HAL_I2C_Slave_Seq_Receive_DMA()</li>
</ul></li>
</ul></li>
<li>Add new I2C transfer options to easy manage the sequential transfers
<ul>
<li>I2C_FIRST_AND_NEXT_FRAME</li>
<li>I2C_LAST_FRAME_NO_STOP</li>
<li>I2C_OTHER_FRAME</li>
<li>I2C_OTHER_AND_LAST_FRAME</li>
</ul></li>
</ul></li>
<li><strong>HAL FMPI2C</strong> update
<ul>
<li>I2C API changes for MISRA-C 2012 compliance:
<ul>
<li>Rename HAL_FMPI2C_Master_Sequential_Transmit_IT() to HAL_FMPI2C_Master_Seq_Transmit_IT()</li>
<li>Rename HAL_FMPI2C_Master_Sequentiel_Receive_IT() to HAL_FMPI2C_Master_Seq_Receive_IT()</li>
<li>Rename HAL_FMPI2C_Master_Sequentiel_Transmit_DMA() to HAL_FMPI2C_Master_Seq_Transmit_DMA()</li>
<li>Rename HAL_FMPI2C_Master_Sequentiel_Receive_DMA() to HAL_FMPI2C_Master_Seq_Receive_DMA()</li>
</ul></li>
<li>Rename FMPI2C_CR1_DFN to FMPI2C_CR1_DNF for more compliance with Reference Manual regarding registers and bit definition naming</li>
<li>Add support of I2C repeated start feature in DMA Mode:
<ul>
<li>With the following new API’s
<ul>
<li>HAL_FMPI2C_Master_Seq_Transmit_DMA()</li>
<li>HAL_FMPI2C_Master_Seq_Receive_DMA()</li>
<li>HAL_FMPI2C_Slave_Seq_Transmit_DMA()</li>
<li>HAL_FMPI2C_Slave_Seq_Receive_DMA()</li>
</ul></li>
</ul></li>
</ul></li>
<li><strong>HAL FLASH</strong> update
<ul>
<li>Update the FLASH_OB_GetRDP() API to return the correct RDP level</li>
</ul></li>
<li><strong>HAL RCC</strong> update
<ul>
<li>Remove GPIOD CLK macros for STM32F412Cx devices (X = D)</li>
<li>Remove GPIOE CLK macros for STM32F412Rx\412Cx devices: (X = E)</li>
<li>Remove GPIOF/G CLK macros for STM32F412Vx\412Rx\412Cx devices (X= F or G)
<ul>
<li>__HAL_RCC_GPIOX_CLK_ENABLE()</li>
<li>__HAL_RCC_GPIO__X___CLK_DISABLE()</li>
<li>__HAL_RCC_GPIO__X___IS_CLK_ENABLED()</li>
<li>__HAL_RCC_GPIO__X___IS_CLK_DISABLED()</li>
<li>__HAL_RCC_GPIO__X___FORCE_RESET()</li>
</ul></li>
</ul></li>
<li><strong>HAL RNG</strong> update
<ul>
<li>Update to manage RNG error code:
<ul>
<li>Add ErrorCode parameter in HAL RNG Handler structure</li>
</ul></li>
</ul></li>
<li><strong>LL ADC</strong> update
<ul>
<li>Add __LL_ADC_CALC_TEMPERATURE() helper macro to calculate the temperature (unit: degree Celsius) from ADC conversion data of internal temperature sensor.</li>
<li>Fix ADC channels configuration issues on STM32F413xx/423xx devices
<ul>
<li>To allow possibility to switch between VBAT and TEMPERATURE channels configurations</li>
<li>HAL_ADC_Start(), HAL_ADC_Start_IT() and HAL_ADC_Start_DMA() update to prevention from starting ADC2 or ADC3 once multimode is enabled</li>
</ul></li>
</ul></li>
<li><strong>HAL DFSDM</strong> update
<ul>
<li>General updates to be compliant with DFSDM bits naming used in CMSIS files.</li>
</ul></li>
<li><strong>HAL CAN</strong> update
<ul>
<li>Update possible values list for FilterActivation parameter in CAN_FilterTypeDef structure
<ul>
<li>CAN_FILTER_ENABLE instead of ENABLE</li>
<li>CAN_FILTER_DISABLE instead of DISABLE</li>
</ul></li>
</ul></li>
<li><strong>HAL CEC</strong> update
<ul>
<li>Update HAL CEC State management method:
<ul>
<li>Remove HAL_CEC_StateTypeDef structure parameters</li>
<li>Add new defines for CEC states</li>
</ul></li>
</ul></li>
<li><strong>HAL DMA</strong> update
<ul>
<li>Add clean of callbacks in HAL_DMA_DeInit() API</li>
</ul></li>
<li><strong>HAL DMA2D</strong> update
<ul>
<li>Remove unused DMA2D_ColorTypeDef structure to be compliant with MISRAC 2012 Rule 2.3</li>
<li>General update to use dedicated defines for DMA2D_BACKGROUND_LAYER and DMA2D_FOREGROUND_LAYER instead of numerical values: 0/1.</li>
</ul></li>
<li><strong>HAL DSI</strong> update
<ul>
<li>Fix read multibyte issue: remove extra call to <strong>HAL_UNLOCK</strong> from DSI_ShortWrite() API.</li>
</ul></li>
<li><strong>HAL/LL RTC</strong> update
<ul>
<li>HAL/ LL drivers optimization
<ul>
<li>HAL driver: remove unused variables</li>
<li>LL driver: getter APIs optimization</li>
</ul></li>
</ul></li>
<li><strong>HAL PWR</strong> update
<ul>
<li>Remove the following API’s as feature not supported by STM32F469xx/479xx devices
<ul>
<li>HAL_PWREx_EnableWakeUpPinPolarityRisingEdge()</li>
<li>HAL_PWREx_EnableWakeUpPinPolarityRisingEdge()</li>
</ul></li>
</ul></li>
<li><strong>HAL SPI</strong> update
<ul>
<li>Update HAL_SPI_StateTypeDef structure to add new state: HAL_SPI_STATE_ABORT</li>
</ul></li>
<li><strong>HAL/LL TIM</strong> update
<ul>
<li>Add new AutoReloadPreload field in TIM_Base_InitTypeDef structure
<ul>
<li>Refer to the TIM examples to identify the changes</li>
</ul></li>
<li>Move the following TIM structures from stm32f4xx_hal_tim_ex.h into stm32f4xx_hal_tim.h
<ul>
<li>TIM_MasterConfigTypeDef</li>
<li>TIM_BreakDeadTimeConfigTypeDef</li>
</ul></li>
<li>Add new TIM Callbacks API’s:
<ul>
<li>HAL_TIM_PeriodElapsedHalfCpltCallback()</li>
<li>HAL_TIM_IC_CaptureHalfCpltCallback()</li>
<li>HAL_TIM_PWM_PulseFinishedHalfCpltCallback()</li>
<li>HAL_TIM_TriggerHalfCpltCallback()</li>
</ul></li>
<li>TIM API changes for MISRA-C 2012 compliance:
<ul>
<li>Rename HAL_TIM_SlaveConfigSynchronization to HAL_TIM_SlaveConfigSynchro</li>
<li>Rename HAL_TIM_SlaveConfigSynchronization_IT to HAL_TIM_SlaveConfigSynchro_IT</li>
<li>Rename HAL_TIMEx_ConfigCommutationEvent to HAL_TIMEx_ConfigCommutEvent</li>
<li>Rename HAL_TIMEx_ConfigCommutationEvent_IT to HAL_TIMEx_ConfigCommutEvent_IT</li>
<li>Rename HAL_TIMEx_ConfigCommutationEvent_DMA to HAL_TIMEx_ConfigCommutEvent_DMA</li>
<li>Rename HAL_TIMEx_CommutationCallback to HAL_TIMEx_CommutCallback</li>
<li>Rename HAL_TIMEx_DMACommutationCplt to TIMEx_DMACommutationCplt</li>
</ul></li>
</ul></li>
<li><strong>HAL/LL USB</strong> update
<ul>
<li>Rework USB interrupt handler and improve HS DMA support in Device mode</li>
<li>Fix BCD handling fr OTG instance in device mode</li>
<li>cleanup reference to low speed in device mode</li>
<li>allow writing TX FIFO in case of transfer length is equal to available space in the TX FIFO</li>
<li>Fix Toggle OUT interrupt channel in host mode</li>
<li>Update USB OTG max number of endpoints (6 FS and 9 HS instead of 5 and 8)</li>
<li>Update USB OTG IP to enable internal transceiver when starting USB device after committee BCD negotiation</li>
</ul></li>
<li><strong>LL IWDG</strong> update
<ul>
<li>Update LL inline macros to use IWDGx parameter instead of IWDG instance defined in CMSIS device</li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section20" aria-hidden="true"> <label for="collapse-section20" aria-hidden="true">V1.7.4 / 02-February-2018</label>
<div>
<h2 id="main-changes-13">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation</li>
<li><strong>HAL</strong> update
<ul>
<li>Update UNUSED() macro implementation to avoid GCC warning
<ul>
<li>The warning is detected when the UNUSED() macro is called from C++ file</li>
</ul></li>
<li>Update to make RAMFUNC define as generic type instead of HAL_StatusTypdef type.</li>
</ul></li>
<li><strong>HAL FLASH</strong> update
<ul>
<li>Update the prototypes of the following APIs after change on RAMFUNC defines
<ul>
<li>HAL_FLASHEx_StopFlashInterfaceClk()</li>
<li>HAL_FLASHEx_StartFlashInterfaceClk()</li>
<li>HAL_FLASHEx_EnableFlashSleepMode()</li>
<li>HAL_FLASHEx_DisableFlashSleepMode()</li>
</ul></li>
</ul></li>
<li><strong>HAL SAI</strong> update
<ul>
<li>Update HAL_SAI_DMAStop() and HAL_SAI_Abort() process to fix the lock/unlock audio issue</li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section19" aria-hidden="true"> <label for="collapse-section19" aria-hidden="true">V1.7.3 / 22-December-2017</label>
<div>
<h2 id="main-changes-14">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation</li>
<li><strong>The following changes done on the HAL drivers require an update on the application code based on older HAL versions</strong>
<ul>
<li><strong>Rework of HAL CAN driver (compatibility break)</strong>
<ul>
<li>A new HAL CAN driver has been redesigned with new APIs, to bypass limitations on CAN Tx/Rx FIFO management present with previous HAL CAN driver version.</li>
<li>The new HAL CAN driver is the recommended version. It is located as usual in Drivers/STM32F4xx_HAL_Driver/Src and Drivers/STM32f4xx_HAL_Driver/Inc folders. It can be enabled through switch HAL_CAN_MODULE_ENABLED in stm32f4xx_hal_conf.h</li>
<li>The legacy HAL CAN driver is also present in the release in Drivers/STM32F4xx_HAL_Driver/Src/Legacy and Drivers/STM32F4xx_HAL_Driver/Inc/Legacy folders for software compatibility reasons. Its usage is not recommended as deprecated. It can however be enabled through switch HAL_CAN_LEGACY_MODULE_ENABLED in stm32f4xx_hal_conf.h</li>
</ul></li>
</ul></li>
<li><strong>HAL</strong> update
<ul>
<li>Update HAL driver to allow user to change systick period to 1ms, 10 ms or 100 ms :
<ul>
<li>Add the following API’s :
<ul>
<li>HAL_GetTickPrio(): Returns a tick priority.</li>
<li>HAL_SetTickFreq(): Sets new tick frequency.</li>
<li>HAL_GetTickFreq(): Returns tick frequency.</li>
</ul></li>
<li>Add HAL_TickFreqTypeDef enumeration for the different Tick Frequencies: 10 Hz, 100 Hz and 1KHz (default).</li>
</ul></li>
</ul></li>
<li><strong>HAL CAN</strong> update
<ul>
<li>Fields of CAN_InitTypeDef structure are reworked:
<ul>
<li>SJW to SyncJumpWidth, BS1 to TimeSeg1, BS2 to TimeSeg2, TTCM to TimeTriggeredMode, ABOM to AutoBusOff, AWUM to AutoWakeUp, NART to AutoRetransmission (inversed), RFLM to ReceiveFifoLocked and TXFP to TransmitFifoPriority</li>
</ul></li>
<li>HAL_CAN_Init() is split into both HAL_CAN_Init() and HAL_CAN_Start() API’s</li>
<li>HAL_CAN_Transmit() is replaced by HAL_CAN_AddTxMessage() to place Tx Request, then HAL_CAN_GetTxMailboxesFreeLevel() for polling until completion.</li>
<li>HAL_CAN_Transmit_IT() is replaced by HAL_CAN_ActivateNotification() to enable transmit IT, then HAL_CAN_AddTxMessage() for place Tx request.</li>
<li>HAL_CAN_Receive() is replaced by HAL_CAN_GetRxFifoFillLevel() for polling until reception, then HAL_CAN_GetRxMessage() to get Rx message.</li>
<li>HAL_CAN_Receive_IT() is replaced by HAL_CAN_ActivateNotification() to enable receive IT, then HAL_CAN_GetRxMessage() in the receivecallback to get Rx message</li>
<li>HAL_CAN_Slepp() is renamed as HAL_CAN_RequestSleep()</li>
<li>HAL_CAN_TxCpltCallback() is split into HAL_CAN_TxMailbox0CompleteCallback(), HAL_CAN_TxMailbox1CompleteCallback() and HAL_CAN_TxMailbox2CompleteCallback().</li>
<li>HAL_CAN_RxCpltCallback is split into HAL_CAN_RxFifo0MsgPendingCallback() and HAL_CAN_RxFifo1MsgPendingCallback().</li>
<li>More complete “How to use the new driver” is detailed in the driver header section itself.</li>
</ul></li>
<li><strong>HAL FMPI2C</strong> update
<ul>
<li>Add new option FMPI2C_LAST_FRAME_NO_STOP for the sequential transfer management
<ul>
<li>This option allows to manage a restart condition after several call of the same master sequential interface.</li>
</ul></li>
</ul></li>
<li><strong>HAL RCC</strong> update
<ul>
<li>Add new HAL macros
<ul>
<li>__HAL_RCC_GET_RTC_SOURCE() allowing to get the RTC clock source</li>
<li>__HAL_RCC_GET_RTC_HSE_PRESCALER() allowing to get the HSE clock divider for RTC peripheral</li>
</ul></li>
<li>Ensure reset of CIR and CSR registers when issuing HAL_RCC_DeInit()/LL_RCC_DeInit functions</li>
<li>Update HAL_RCC_OscConfig() to keep backup domain enabled when configuring respectively LSE and RTC clock source</li>
<li>Add new HAL interfaces allowing to control the activation or deactivation of PLLI2S and PLLSAI:
<ul>
<li>HAL_RCCEx_EnablePLLI2S()</li>
<li>HAL_RCCEx_DisablePLLI2S()</li>
<li>HAL_RCCEx_EnablePLLSAI()</li>
<li>HAL_RCCEx_DisablePLLSAI()</li>
</ul></li>
</ul></li>
<li><strong>LL RCC</strong> update
<ul>
<li>Add new LL RCC macro
<ul>
<li>LL_RCC_PLL_SetMainSource() allowing to configure PLL main clock source</li>
</ul></li>
</ul></li>
<li><strong>LL FMC / LL FSMC</strong> update
<ul>
<li>Add clear of the PTYP bit to select the PCARD mode in FMC_PCCARD_Init() / FSMC_PCCARD_Init()<br />
</li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section18" aria-hidden="true"> <label for="collapse-section18" aria-hidden="true">V1.7.2 / 06-October-2017</label>
<div>
<h2 id="main-changes-15">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation</li>
<li>Fix compilation warning with GCC compiler</li>
<li>Remove Date and version from header files</li>
<li>Update HAL drivers to refer to the new CMSIS bit position defines instead of usage the POSITION_VAL() macro</li>
<li><strong>HAL Generic</strong> update
<ul>
<li>stm32f4xx_hal_def.h file changes:
<ul>
<li>Update __weak and __packed defined values for ARM compiler</li>
<li>Update __ALIGN_BEGIN and __ALIGN_END defined values for ARM compiler</li>
</ul></li>
<li>stm32f4xx_ll_system.h file: add LL_SYSCFG_REMAP_SDRAM define</li>
</ul></li>
<li><strong>HAL ADC</strong> update
<ul>
<li>Fix wrong definition of ADC channel temperature sensor for STM32F413xx and STM32F423xx devices.</li>
</ul></li>
<li><strong>HAL DMA</strong> update
<ul>
<li>Update values for the following defines: DMA_FLAG_FEIF0_4 and DMA_FLAG_DMEIF0_4</li>
</ul></li>
<li><strong>HAL DSI</strong> update
<ul>
<li>Fix Extra warning with SW4STM32 compiler</li>
<li>Fix DSI display issue when using EWARM w/ high level optimization</li>
<li>Fix MISRAC errors</li>
</ul></li>
<li><strong>HAL FLASH</strong> update
<ul>
<li>HAL_FLASH_Unlock() update to return state error when the FLASH is already unlocked</li>
</ul></li>
<li><strong>HAL FMPI2C</strong> update
<ul>
<li>Update Interface APIs headers to remove confusing message about device address</li>
<li>Update FMPI2C_WaitOnRXNEFlagUntilTimeout() to resolve a race condition between STOPF and RXNE Flags</li>
<li>Update FMPI2C_TransferConfig() to fix wrong bit management.</li>
<li>Update code comments to use DMA stream instead of DMA channel</li>
</ul></li>
<li><strong>HAL PWR</strong> update
<ul>
<li>HAL_PWR_EnableWakeUpPin() update description to add support of PWR_WAKEUP_PIN2 and PWR_WAKEUP_PIN3</li>
</ul></li>
<li><strong>HAL NOR</strong> update
<ul>
<li>Add the support of STM32F412Rx devices</li>
</ul></li>
<li><strong>HAL I2C</strong> update
<ul>
<li>Update Interface APIs headers to remove confusing message about device address</li>
<li>Update I2C_MasterReceive_RXNE() and I2C_MasterReceive_BTF() static APIs to fix bad Handling of NACK in I2C master receive process.</li>
</ul></li>
<li><strong>HAL RCC</strong> update
<ul>
<li>Update HAL_RCC_GetOscConfig() API to:
<ul>
<li>set PLLR in the RCC_OscInitStruct</li>
<li>check on null pointer</li>
</ul></li>
<li>Update HAL_RCC_ClockConfig() API to:
<ul>
<li>check on null pointer</li>
<li>optimize code size by updating the handling method of the SWS bits</li>
<li>update to use __HAL_FLASH_GET_LATENCY() flash macro instead of using direct register access to LATENCY bits in FLASH ACR register.</li>
</ul></li>
<li>Update HAL_RCC_DeInit() and LL_RCC_DeInit() APIs to
<ul>
<li>Be able to return HAL/LL status</li>
<li>Add checks for HSI, PLL and PLLI2S ready before modifying RCC CFGR registers</li>
<li>Clear all interrupt flags</li>
<li>Initialize systick interrupt period</li>
</ul></li>
<li>Update HAL_RCC_GetSysClockFreq() to avoid risk of rounding error which may leads to a wrong returned value.</li>
</ul></li>
<li><strong>HAL RNG</strong> update
<ul>
<li>HAL_RNG_Init() remove Lock()/Unlock()</li>
</ul></li>
<li><strong>HAL MMC</strong> update
<ul>
<li>HAL_MMC_Erase() API: add missing () to fix compilation warning detected with SW4STM32 when extra feature is enabled.</li>
</ul></li>
<li><strong>HAL RTC</strong> update
<ul>
<li>HAL_RTC_Init() API: update to force the wait for synchro before setting TAFCR register when BYPSHAD bit in CR register is 0.</li>
</ul></li>
<li><strong>HAL SAI</strong> update
<ul>
<li>Update HAL_SAI_DMAStop() API to flush fifo after disabling SAI</li>
</ul></li>
<li><strong>HAL I2S</strong> update
<ul>
<li>Update I2S DMA fullduplex process to handle I2S Rx and Tx DMA Half transfer complete callback</li>
</ul></li>
<li><strong>HAL TIM</strong> update
<ul>
<li>Update HAL_TIMEx_OCN_xxxx() and HAL_TIMEx_PWMN_xxx() API description to remove support of TIM_CHANNEL_4</li>
</ul></li>
<li><strong>LL DMA</strong> update
<ul>
<li>Update to clear DMA flags using WRITE_REG() instead SET_REG() API to avoid read access to the IFCR register that is write only.</li>
</ul></li>
<li><strong>LL RTC</strong> update
<ul>
<li>Fix warning with static analyzer</li>
</ul></li>
<li><strong>LL USART</strong> update
<ul>
<li>Add assert macros to check USART BaudRate register</li>
</ul></li>
<li><strong>LL I2C</strong> update
<ul>
<li>Rename IS_I2C_CLOCK_SPEED() and IS_I2C_DUTY_CYCLE() respectively to IS_LL_I2C_CLOCK_SPEED() and IS_LL_I2C_DUTY_CYCLE() to avoid incompatible macros redefinition.</li>
</ul></li>
<li><strong>LL TIM</strong> update
<ul>
<li>Update LL_TIM_EnableUpdateEvent() API to clear UDIS bit in TIM CR1 register instead of setting it.</li>
<li>Update LL_TIM_DisableUpdateEvent() API to set UDIS bit in TIM CR1 register instead of clearing it.</li>
</ul></li>
<li><strong>LL USART</strong> update
<ul>
<li>Fix MISRA error w/ IS_LL_USART_BRR() macro</li>
<li>Fix wrong check when UART10 instance is used</li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section17" aria-hidden="true"> <label for="collapse-section17" aria-hidden="true">V1.7.1 / 14-April-2017</label>
<div>
<h2 id="main-changes-16">Main Changes</h2>
<ul>
<li>Update CHM UserManuals to support LL drivers</li>
<li>General updates to fix known defects and enhancements implementation</li>
<li><strong>HAL CAN</strong> update
<ul>
<li>Add management of overrun error.</li>
<li>Allow possibility to receive messages from the 2 RX FIFOs in parallel via interrupt.</li>
<li>Fix message lost issue with specific sequence of transmit requests.</li>
<li>Handle transmission failure with error callback, when NART is enabled.</li>
<li>Add __HAL_CAN_CANCEL_TRANSMIT() call to abort transmission when timeout is reached</li>
</ul></li>
<li><strong>HAL PWR</strong> update
<ul>
<li>HAL_PWREx_EnterUnderDriveSTOPMode() API: remove check on UDRDY flag</li>
</ul></li>
<li><strong>LL ADC</strong> update
<ul>
<li>Fix wrong ADC group injected sequence configuration
<ul>
<li>LL_ADC_INJ_SetSequencerRanks() and LL_ADC_INJ_GetSequencerRanks() API’s update to take in consideration the ADC number of conversions</li>
<li>Update the defined values for ADC group injected seqencer ranks</li>
</ul></li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section16" aria-hidden="true"> <label for="collapse-section16" aria-hidden="true">V1.7.0 / 17-February-2017</label>
<div>
<h2 id="main-changes-17">Main Changes</h2>
<ul>
<li><strong>Add Low Layer drivers allowing performance and footprint optimization</strong>
<ul>
<li>Low Layer drivers APIs provide register level programming: require deep knowledge of peripherals described in STM32F4xx Reference Manuals</li>
<li>Low Layer drivers are available for: ADC, Cortex, CRC, DAC, DMA, DMA2D, EXTI, GPIO, I2C, IWDG, LPTIM, PWR, RCC, RNG, RTC, SPI, TIM, USART, WWDG peripherals and additional Low Level Bus, System and Utilities APIs.</li>
<li>Low Layer drivers APIs are implemented as static inline function in new Inc/stm32f4xx_ll_ppp.h files for PPP peripherals, there is no configuration file and each stm32f4xx_ll_ppp.h file must be included in user code.</li>
</ul></li>
<li>General updates to fix known defects and enhancements implementation</li>
<li>Fix extra warnings with GCC compiler</li>
<li>HAL drivers clean up: remove double casting ‘uint32_t’ and ‘U’</li>
<li>Add new <strong>HAL MMC</strong> driver</li>
<li><strong>The following changes done on the HAL drivers require an update on the application code based on older HAL versions</strong></li>
<li><strong>HAL SD</strong> update
<ul>
<li>Overall rework of the driver for a more efficient implementation
<ul>
<li>Modify initialization API and structures</li>
<li>Modify Read / Write sequences: separate transfer process and SD Cards state management</li>
<li>Adding interrupt mode for Read / Write operations</li>
<li>Update the HAL_SD_IRQHandler function by optimizing the management of interrupt errors</li>
</ul></li>
<li>Refer to the following example to identify the changes: BSP example and USB_Device/MSC_Standalone application</li>
</ul></li>
<li><strong>HAL NAND</strong> update
<ul>
<li>Modify NAND_AddressTypeDef, NAND_DeviceConfigTypeDef and NAND_HandleTypeDef structures fields</li>
<li>Add new HAL_NAND_ConfigDevice API</li>
</ul></li>
<li><strong>HAL DFSDM</strong> update
<ul>
<li>Add support of Multichannel Delay feature
<ul>
<li>Add HAL_DFSDM_ConfigMultiChannelDelay API</li>
<li>The following APIs are moved to internal static functions: HAL_DFSDM_ClockIn_SourceSelection, HAL_DFSDM_ClockOut_SourceSelection, HAL_DFSDM_DataInX_SourceSelection (X=0,2,4,6), HAL_DFSDM_BitStreamClkDistribution_Config</li>
</ul></li>
</ul></li>
<li><strong>HAL I2S</strong> update
<ul>
<li>Add specific callback API to manage I2S full duplex end of transfer process:
<ul>
<li>HAL_I2S_TxCpltCallback() and HAL_I2S_RxCpltCallback() API’s will be replaced with only HAL_I2SEx_TxRxCpltCallback() API.</li>
</ul></li>
</ul></li>
<li><strong>HAL</strong> update
<ul>
<li>Modify default HAL_Delay implementation to guarantee minimum delay</li>
</ul></li>
<li><strong>HAL Cortex</strong> update
<ul>
<li>Move HAL_MPU_Disable() and HAL_MPU_Enable() from stm32f4xx_hal_cortex.h to stm32f4xx_hal_cortex.c</li>
<li>Clear the whole MPU control register in HAL_MPU_Disable() API</li>
</ul></li>
<li><strong>HAL FLASH</strong> update
<ul>
<li>IS_FLASH_ADDRESS() macro update to support OTP range</li>
<li>FLASH_Program_DoubleWord(): Replace 64-bit accesses with 2 double-words operations</li>
</ul></li>
<li><strong>LL GPIO</strong> update
<ul>
<li>Update IS_GPIO_PIN() macro implementation to be more safe</li>
</ul></li>
<li><strong>LL RCC</strong> update
<ul>
<li>Update IS_RCC_PLLQ_VALUE() macro implementation: the minimum accepted value is 2 instead of 4</li>
<li>Rename RCC_LPTIM1CLKSOURCE_PCLK define to RCC_LPTIM1CLKSOURCE_PCLK1</li>
<li>Fix compilation issue w/ __HAL_RCC_USB_OTG_FS_IS_CLK_ENABLED() and __HAL_RCC_USB_OTG_FS_IS_CLK_DISABLED() macros for STM32F401xx devices</li>
<li>Add the following is clock enabled macros for STM32F401xx devices
<ul>
<li>__HAL_RCC_SDIO_IS_CLK_ENABLED()</li>
<li>__HAL_RCC_SPI4_IS_CLK_ENABLED()</li>
<li>__HAL_RCC_TIM10_IS_CLK_ENABLED()</li>
</ul></li>
<li>Add the following is clock enabled macros for STM32F410xx devices
<ul>
<li>__HAL_RCC_CRC_IS_CLK_ENABLED()</li>
<li>__HAL_RCC_RNG_IS_CLK_ENABLED()</li>
</ul></li>
<li>Update HAL_RCC_DeInit() to reset the RCC clock configuration to the default reset state.</li>
<li>Remove macros to configure BKPSRAM from STM32F401xx devices</li>
<li>Update to refer to AHBPrescTable[] and APBPrescTable[] tables defined in system_stm32f4xx.c file instead of APBAHBPrescTable[] table.</li>
</ul></li>
<li><strong>HAL FMPI2C</strong> update
<ul>
<li>Add FMPI2C_FIRST_AND_NEXT_FRAME define in Sequential Transfer Options</li>
</ul></li>
<li><strong>HAL ADC</strong> update
<ul>
<li>HAL_ADCEx_InjectedConfigChannel(): update the external trigger injected condition</li>
</ul></li>
<li><strong>HAL DMA</strong> update
<ul>
<li>HAL_DMA_Init(): update to check compatibility between FIFO threshold level and size of the memory burst</li>
</ul></li>
<li><strong>HAL QSPI</strong> update
<ul>
<li>QSPI_HandleTypeDef structure: Update transfer parameters on uint32_t instead of uint16_t</li>
</ul></li>
<li><strong>HAL UART/USART/IrDA/SMARTCARD</strong> update
<ul>
<li>DMA Receive process; the code has been updated to clear the USART OVR flag before enabling DMA receive request.</li>
<li>UART_SetConfig() update to manage correctly USART6 instance that is not available on STM32F410Tx devices</li>
</ul></li>
<li><strong>HAL CAN</strong> update
<ul>
<li>Remove Lock mechanism from HAL_CAN_Transmit_IT() and HAL_CAN_Receive_IT() processes</li>
</ul></li>
<li><strong>HAL TIM</strong> update
<ul>
<li>Add __HAL_TIM_MOE_DISABLE_UNCONDITIONALLY() macro to disable Master output without check on TIM channel state.</li>
<li>Update HAL_TIMEx_ConfigBreakDeadTime() to fix TIM BDTR register corruption.</li>
</ul></li>
<li><strong>HAL I2C</strong> update
<ul>
<li>Update HAL_I2C_Master_Transmit() and HAL_I2C_Slave_Transmit() to avoid sending extra bytes at the end of the transmit processes</li>
<li>Update HAL_I2C_Mem_Read() API to fix wrong check on misused parameter “Size”</li>
<li>Update I2C_MasterReceive_RXNE() and I2C_MasterReceive_BTF() static APIs to enhance Master sequential reception process.</li>
</ul></li>
<li><strong>HAL SPI</strong> update
<ul>
<li>Add transfer abort APIs and associated callbacks in interrupt mode
<ul>
<li>HAL_SPI_Abort()</li>
<li>HAL_SPI_Abort_IT()</li>
<li>HAL_SPI_AbortCpltCallback()</li>
</ul></li>
</ul></li>
<li><strong>HAL I2S</strong> update
<ul>
<li>Add specific callback API to manage I2S full duplex end of transfer process:
<ul>
<li>HAL_I2S_TxCpltCallback() and HAL_I2S_RxCpltCallback() API’s will be replaced with only HAL_I2SEx_TxRxCpltCallback() API.</li>
</ul></li>
<li>Update I2S Transmit/Receive polling process to manage Overrun and Underrun errors</li>
<li>Move the I2S clock input frequency calculation to HAL RCC driver.</li>
<li>Update the HAL I2SEx driver to keep only full duplex feature.</li>
<li>HAL_I2S_Init() API updated to
<ul>
<li>Fix wrong I2S clock calculation when PCM mode is used.</li>
<li>Return state HAL_I2S_ERROR_PRESCALER when the I2S clock is wrongly configured</li>
</ul></li>
</ul></li>
<li><strong>HAL LTDC</strong> update
<ul>
<li>Optimize HAL_LTDC_IRQHandler() function by using direct register read</li>
<li>Rename the following API’s
<ul>
<li>HAL_LTDC_Relaod() by HAL_LTDC_Reload()</li>
<li>HAL_LTDC_StructInitFromVideoConfig() by HAL_LTDCEx_StructInitFromVideoConfig()</li>
<li>HAL_LTDC_StructInitFromAdaptedCommandConfig() by HAL_LTDCEx_StructInitFromAdaptedCommandConfig()</li>
</ul></li>
<li>Add new defines for LTDC layers (LTDC_LAYER_1 / LTDC_LAYER_2)</li>
<li>Remove unused asserts</li>
</ul></li>
<li><strong>HAL USB PCD</strong> update
<ul>
<li>Flush all TX FIFOs on USB Reset</li>
<li>Remove Lock mechanism from HAL_PCD_EP_Transmit() and HAL_PCD_EP_Receive() API’s</li>
</ul></li>
<li><strong>LL USB</strong> update
<ul>
<li>Enable DMA Burst mode for USB OTG HS</li>
<li>Fix SD card detection issue</li>
</ul></li>
<li><strong>LL SDMMC</strong> update
<ul>
<li>Add new SDMMC_CmdSDEraseStartAdd, SDMMC_CmdSDEraseEndAdd, SDMMC_CmdOpCondition and SDMMC_CmdSwitch functions</li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section15" aria-hidden="true"> <label for="collapse-section15" aria-hidden="true">V1.6.0 / 04-November-2016</label>
<div>
<h2 id="main-changes-18">Main Changes</h2>
<ul>
<li>Add support of <strong>STM32F413xx</strong> and <strong>STM32F423xx</strong> devices</li>
<li>General updates to fix known defects and enhancements implementation</li>
<li><strong>HAL CAN</strong> update
<ul>
<li>Update to add the support of 3 CAN management</li>
</ul></li>
<li><strong>HAL CRYP</strong> update
<ul>
<li>Update to add the support of AES features</li>
</ul></li>
<li><strong>HAL DFSDM</strong> update
<ul>
<li>Add definitions for new external trigger filters</li>
<li>Add definition for new Channels 4, 5, 6 and 7</li>
<li>Add functions and API for Filter state configuration and management</li>
<li>Add new functions:
<ul>
<li>HAL_DFSDM_BitstreamClock_Start()</li>
<li>HAL_DFSDM_BitstreamClock_Stop()</li>
<li>HAL_DFSDM_BitStreamClkDistribution_Config()</li>
</ul></li>
</ul></li>
<li><strong>HAL DMA</strong>
<ul>
<li>Add the support of DMA Channels from 8 to 15</li>
<li>Update HAL_DMA_DeInit() function with the check on DMA stream instance</li>
</ul></li>
<li><strong>HAL DSI</strong> update
<ul>
<li>Update HAL_DSI_ConfigHostTimeouts() and HAL_DSI_Init() functions to avoid scratch in DSI_CCR register</li>
</ul></li>
<li><strong>HAL FLASH</strong> update
<ul>
<li>Enhance FLASH_WaitForLastOperation() function implementation</li>
<li>Update __HAL_FLASH_GET_FLAG() macro implementation</li>
</ul></li>
<li><strong>HAL GPIO</strong> update
<ul>
<li>Add specific alternate functions definitions</li>
</ul></li>
<li><strong>HAL I2C</strong> update
<ul>
<li>Update I2C_DMAError() function implementation to ignore DMA FIFO error</li>
</ul></li>
<li><strong>HAL I2S</strong> update
<ul>
<li>Enhance HAL_I2S_Init() implementation to test on PCM_SHORT and PCM_LONG standards</li>
</ul></li>
<li><strong>HAL IRDA</strong> update
<ul>
<li>Add new functions and call backs for Transfer Abort
<ul>
<li>HAL_IRDA_Abort()</li>
<li>HAL_IRDA_AbortTransmit()</li>
<li>HAL_IRDA_AbortReceive()</li>
<li>HAL_IRDA_Abort_IT()</li>
<li>HAL_IRDA_AbortTransmit_IT()</li>
<li>HAL_IRDA_AbortReceive_IT()</li>
<li>HAL_IRDA_AbortCpltCallback()</li>
<li>HAL_IRDA_AbortTransmitCpltCallback()</li>
<li>HAL_IRDA_AbortReceiveCpltCallback()</li>
</ul></li>
</ul></li>
<li><strong>HAL PCD</strong> update
<ul>
<li>Update HAL_PCD_GetRxCount() function implementation</li>
</ul></li>
<li><strong>HAL RCC</strong> update
<ul>
<li>Update __HAL_RCC_HSE_CONFIG() macro implementation</li>
<li>Update __HAL_RCC_LSE_CONFIG() macro implementation</li>
</ul></li>
<li><strong>HAL SMARTCARD</strong> update
<ul>
<li>Add new functions and call backs for Transfer Abort
<ul>
<li>HAL_ SMARTCARD_Abort()</li>
<li>HAL_ SMARTCARD_AbortTransmit()</li>
<li>HAL_ SMARTCARD_AbortReceive()</li>
<li>HAL_ SMARTCARD_Abort_IT()</li>
<li>HAL_ SMARTCARD_AbortTransmit_IT()</li>
<li>HAL_ SMARTCARD_AbortReceive_IT()</li>
<li>HAL_ SMARTCARD_AbortCpltCallback()</li>
<li>HAL_ SMARTCARD_AbortTransmitCpltCallback()</li>
<li>HAL_ SMARTCARD_AbortReceiveCpltCallback()</li>
</ul></li>
</ul></li>
<li><strong>HAL TIM</strong> update
<ul>
<li>Update HAL_TIMEx_RemapConfig() function to manage TIM internal trigger remap: LPTIM or TIM3_TRGO</li>
</ul></li>
<li><strong>HAL UART</strong> update
<ul>
<li>Add Transfer abort functions and callbacks</li>
</ul></li>
<li><strong>HAL USART</strong> update
<ul>
<li>Add Transfer abort functions and callbacks</li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section14" aria-hidden="true"> <label for="collapse-section14" aria-hidden="true">V1.5.2 / 22-September-2016</label>
<div>
<h2 id="main-changes-19">Main Changes</h2>
<ul>
<li><strong>HAL I2C</strong> update
<ul>
<li>Fix wrong behavior in consecutive transfers in case of single byte transmission (Master/Memory Receive interfaces)</li>
<li>Update HAL_I2C_Master_Transmit_DMA() / HAL_I2C_Master_Receive_DMA()/ HAL_I2C_Slave_Transmit_DMA() and HAL_I2C_Slave_Receive_DMA() to manage addressing phase through interruption instead of polling</li>
<li>Add a check on I2C handle state at start of all I2C API’s to ensure that I2C is ready</li>
<li>Update I2C API’s (Polling, IT and DMA interfaces) to manage I2C XferSize and XferCount handle parameters instead of API size parameter to help user to get information of counter in case of error.</li>
<li>Update Abort functionality to manage DMA use case</li>
</ul></li>
<li><strong>HAL FMPI2C</strong> update
<ul>
<li>Update to disable Own Address before setting the new Own Address configuration:
<ul>
<li>Update HAL_FMPI2C_Init() to disable FMPI2C_OARx_EN bit before any configuration in OARx registers</li>
</ul></li>
</ul></li>
<li><strong>HAL CAN</strong> update
<ul>
<li>Update CAN receive processes to set CAN RxMsg FIFONumber parameter</li>
</ul></li>
<li><strong>HAL UART</strong> update
<ul>
<li>Update UART handle TxXferCount and RxXferCount parameters as volatile to avoid eventual issue with High Speed optimization</li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section13" aria-hidden="true"> <label for="collapse-section13" aria-hidden="true">V1.5.1 / 01-July-2016</label>
<div>
<h2 id="main-changes-20">Main Changes</h2>
<ul>
<li><strong>HAL GPIO</strong> update
<ul>
<li>HAL_GPIO_Init()/HAL_GPIO_DeInit() API’s: update GPIO_GET_INDEX() macro implementation to support all GPIO’s</li>
</ul></li>
<li><strong>HAL SPI</strong> update
<ul>
<li>Fix regression issue: restore HAL_SPI_DMAPause() and HAL_SPI_DMAResume() API’s</li>
</ul></li>
<li><strong>HAL RCC</strong> update
<ul>
<li>Fix FSMC macros compilation warnings with STM32F412Rx devices</li>
</ul></li>
<li><strong>HAL DMA</strong> update
<ul>
<li>HAL_DMA_PollFortransfer() API clean up</li>
</ul></li>
<li><strong>HAL PPP</strong> update(PPP refers to IRDA, UART, USART and SMARTCARD)
<ul>
<li>Update HAL_PPP_IRQHandler() to add a check on interrupt source before managing the error</li>
</ul></li>
<li><strong>HAL QSPI</strong> update
<ul>
<li>Implement workaround to fix the limitation pronounced in the Errata sheet 2.1.8 section: In some specific cases, DMA2 data corruption occurs when managing AHB and APB2 peripherals in a concurrent way</li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section12" aria-hidden="true"> <label for="collapse-section12" aria-hidden="true">V1.5.0 / 06-May-2016</label>
<div>
<h2 id="main-changes-21">Main Changes</h2>
<ul>
<li>Add support of <strong>STM32F412cx, STM32F412rx, STM32F412vx and STM32F412zx</strong> devices</li>
<li>General updates to fix known defects and enhancements implementation</li>
<li>Add new HAL driver for <strong>DFSDM</strong> peripheral</li>
<li>Enhance HAL delay and time base implementation:
<ul>
<li>Add new drivers stm32f4xx_hal_timebase_rtc_alarm_template.c and stm32f4xx_hal_timebase_rtc_wakeup_template.c which override the native HAL time base functions (defined as weak) to either use the RTC as time base tick source. For more details about the usage of these drivers, please refer to HAL_TimeBase_RTC examples and FreeRTOS-based applications</li>
</ul></li>
<li><strong>The following changes done on the HAL drivers require an update on the application code based on HAL V1.4.4</strong>
<ul>
<li>HAL UART, USART, IRDA, SMARTCARD, SPI, I2C,FMPI2C, QSPI (referenced as PPP here below) drivers
<ul>
<li>Add PPP error management during DMA process. This requires the following updates on user application:
<ul>
<li>Configure and enable the PPP IRQ in HAL_PPP_MspInit() function</li>
<li>In stm32f4xx_it.c file, PPP_IRQHandler() function: add a call to HAL_PPP_IRQHandler() function</li>
<li>Add and customize the Error Callback API: HAL_PPP_ErrorCallback()</li>
</ul></li>
</ul></li>
<li>HAL I2C, FMPI2C (referenced as PPP here below) drivers:
<ul>
<li>Update to avoid waiting on STOPF/BTF/AF flag under DMA ISR by using the PPP end of transfer interrupt in the DMA transfer process. This requires the following updates on user application:
<ul>
<li>Configure and enable the PPP IRQ in HAL_PPP_MspInit() function</li>
<li>In stm32f4xx_it.c file, PPP_IRQHandler() function: add a call to HAL_PPP_IRQHandler() function</li>
</ul></li>
</ul></li>
<li>HAL I2C driver:
<ul>
<li>I2C transfer processes IT update: NACK during addressing phase is managed through I2C Error interrupt instead of HAL state</li>
</ul></li>
<li>HAL IWDG driver: rework overall driver for better implementation
<ul>
<li>Remove HAL_IWDG_Start(), HAL_IWDG_MspInit() and HAL_IWDG_GetState() APIs</li>
</ul></li>
<li>HAL WWDG driver: rework overall driver for better implementation
<ul>
<li>Remove HAL_WWDG_Start(), HAL_WWDG_Start_IT(), HAL_WWDG_MspDeInit() and HAL_WWDG_GetState() APIs</li>
<li>Update the HAL_WWDG_Refresh(WWDG_HandleTypeDef *hwwdg, uint32_t counter) function and API by removing the “counter” parameter</li>
</ul></li>
<li>HAL QSPI driver: Enhance the DMA transmit process by using PPP TC interrupt instead of waiting on TC flag under DMA ISR. This requires the following updates on user application:
<ul>
<li>Configure and enable the QSPI IRQ in HAL_QSPI_MspInit() function</li>
<li>In stm32f4xx_it.c file, QSPI_IRQHandler() function: add a call to HAL_QSPI_IRQHandler() function</li>
</ul></li>
<li>HAL CEC driver: Overall driver rework with compatibility break versus previous HAL version
<ul>
<li>Remove HAL CEC polling Process functions: HAL_CEC_Transmit() and HAL_CEC_Receive()</li>
<li>Remove HAL CEC receive interrupt process function HAL_CEC_Receive_IT() and enable the “receive” mode during the Init phase</li>
<li>Rename HAL_CEC_GetReceivedFrameSize() function to HAL_CEC_GetLastReceivedFrameSize()</li>
<li>Add new HAL APIs: HAL_CEC_SetDeviceAddress() and HAL_CEC_ChangeRxBuffer()</li>
<li>Remove the ‘InitiatorAddress’ field from the CEC_InitTypeDef structure and manage it as a parameter in the HAL_CEC_Transmit_IT() function</li>
<li>Add new parameter ‘RxFrameSize’ in HAL_CEC_RxCpltCallback() function</li>
<li>Move CEC Rx buffer pointer from CEC_HandleTypeDef structure to CEC_InitTypeDef structure</li>
</ul></li>
</ul></li>
<li><strong>HAL RCC</strong> update
<ul>
<li>Update HAL_RCC_ClockConfig() function to adjust the SystemCoreClock</li>
<li>Rename macros and Literals:
<ul>
<li>RCC_PERIPHCLK_CK48 by RCC_PERIPHCLK_CLK48</li>
<li>IS_RCC_CK48CLKSOURCE by IS_RCC_CLK48CLKSOURCE</li>
<li>RCC_CK48CLKSOURCE_PLLSAIP by RCC_CLK48CLKSOURCE_PLLSAIP</li>
<li>RCC_SDIOCLKSOURCE_CK48 by RCC_SDIOCLKSOURCE_CLK48</li>
<li>RCC_CK48CLKSOURCE_PLLQ by RCC_CLK48CLKSOURCE_PLLQ</li>
</ul></li>
<li>Update HAL_RCCEx_GetPeriphCLKConfig() and HAL_RCCEx_PeriphCLKConfig() functions to support TIM Prescaler for STM32F411xx devices</li>
<li>HAL_RCCEx_PeriphCLKConfig() API: update to fix the RTC clock configuration issue</li>
</ul></li>
<li><strong>HAL CEC</strong> update
<ul>
<li>Overall driver rework with break of compatibility with HAL V1.4.4
<ul>
<li>Remove the HAL CEC polling Process: HAL_CEC_Transmit() and HAL_CEC_Receive()</li>
<li>Remove the HAL CEC receive interrupt process (HAL_CEC_Receive_IT()) and manage the “Receive” mode enable within the Init phase</li>
<li>Rename HAL_CEC_GetReceivedFrameSize() function to HAL_CEC_GetLastReceivedFrameSize() function</li>
<li>Add new HAL APIs: HAL_CEC_SetDeviceAddress() and HAL_CEC_ChangeRxBuffer()</li>
<li>Remove the ‘InitiatorAddress’ field from the CEC_InitTypeDef structure and manage it as a parameter in the HAL_CEC_Transmit_IT() function</li>
<li>Add new parameter ‘RxFrameSize’ in HAL_CEC_RxCpltCallback() function</li>
<li>Move CEC Rx buffer pointer from CEC_HandleTypeDef structure to CEC_InitTypeDef structure</li>
</ul></li>
<li>Update driver to implement the new CEC state machine:
<ul>
<li>Add new “rxState” field in CEC_HandleTypeDef structure to provide the CEC state information related to Rx Operations</li>
<li>Rename “state” field in CEC_HandleTypeDef structure to “gstate”: CEC state information related to global Handle management and Tx Operations</li>
<li>Update CEC process to manage the new CEC states.</li>
<li>Update __HAL_CEC_RESET_HANDLE_STATE() macro to handle the new CEC state parameters (gState, rxState)</li>
</ul></li>
</ul></li>
<li><strong>HAL UART, USART, SMARTCARD and IRDA</strong> (referenced as PPP here below) update
<ul>
<li>Update Polling management:
<ul>
<li>The user Timeout value must be estimated for the overall process duration: the Timeout measurement is cumulative</li>
</ul></li>
<li>Update DMA process:
<ul>
<li>Update the management of PPP peripheral errors during DMA process. This requires the following updates in user application:
<ul>
<li>Configure and enable the PPP IRQ in HAL_PPP_MspInit() function</li>
<li>In stm32f4xx_it.c file, PPP_IRQHandler() function: add a call to HAL_PPP_IRQHandler() function</li>
<li>Add and customize the Error Callback API: HAL_PPP_ErrorCallback()</li>
</ul></li>
</ul></li>
</ul></li>
<li><strong>HAL FMC update</strong>
<ul>
<li>Update FMC_NORSRAM_Init() to remove the Burst access mode configuration</li>
<li>Update FMC_SDRAM_Timing_Init() to fix initialization issue when configuring 2 SDRAM banks</li>
</ul></li>
<li><strong>HAL HCD</strong> update
<ul>
<li>Update HCD_Port_IRQHandler() to unmask disconnect IT only when the port is disabled</li>
</ul></li>
<li><strong>HAL I2C/FMPI2C</strong> update
<ul>
<li>Update Polling management:
<ul>
<li>The Timeout value must be estimated for the overall process duration: the Timeout measurement is cumulative</li>
</ul></li>
<li>Add the management of Abort service: Abort DMA transfer through interrupt
<ul>
<li>In the case of Master Abort IT transfer usage:
<ul>
<li>Add new user HAL_I2C_AbortCpltCallback() to inform user of the end of abort process</li>
<li>A new abort state is defined in the HAL_I2C_StateTypeDef structure</li>
</ul></li>
</ul></li>
<li>Add the management of I2C peripheral errors, ACK failure and STOP condition detection during DMA process. This requires the following updates on user application:
<ul>
<li>Configure and enable the I2C IRQ in HAL_I2C_MspInit() function</li>
<li>In stm32f4xx_it.c file, I2C_IRQHandler() function: add a call to HAL_I2C_IRQHandler() function</li>
<li>Add and customize the Error Callback API: HAL_I2C_ErrorCallback()</li>
<li>Refer to the I2C_EEPROM or I2C_TwoBoards_ComDMA project examples usage of the API</li>
</ul></li>
<li>NACK error during addressing phase is returned through interrupt instead of previously through I2C transfer API’s</li>
<li>I2C addressing phase is updated to be managed using interrupt instead of polling (Only for HAL I2C driver)
<ul>
<li>Add new static functions to manage I2C SB, ADDR and ADD10 flags</li>
</ul></li>
</ul></li>
<li><strong>HAL SPI</strong> update
<ul>
<li>Overall driver optimization to improve performance in polling/interrupt mode to reach maximum peripheral frequency
<ul>
<li>Polling mode:
<ul>
<li>Replace the use of SPI_WaitOnFlagUnitTimeout() function by “if” statement to check on RXNE/TXE flags while transferring data</li>
</ul></li>
<li>Interrupt mode:
<ul>
<li>Minimize access on SPI registers</li>
</ul></li>
<li>All modes:
<ul>
<li>Add the USE_SPI_CRC switch to minimize the number of statements when CRC calculation is disabled</li>
<li>Update timeout management to check on global processes</li>
<li>Update error code management in all processes</li>
</ul></li>
<li>Update DMA process:
<ul>
<li>Add the management of SPI peripheral errors during DMA process. This requires the following updates in the user application:</li>
<li>Configure and enable the SPI IRQ in HAL_SPI_MspInit() function</li>
<li>In stm32f4xx_it.c file, SPI_IRQHandler() function: add a call to HAL_SPI_IRQHandler() function</li>
<li>Add and customize the Error Callback API: HAL_SPI_ErrorCallback()</li>
<li>Refer to the following example which describe the changes: SPI_FullDuplex_ComDMA</li>
</ul></li>
<li>Fix regression in polling mode:
<ul>
<li>Add preparing data to transmit in case of slave mode in HAL_SPI_TransmitReceive() and HAL_SPI_Transmit()</li>
<li>Add to manage properly the overrun flag at the end of a HAL_SPI_TransmitReceive()</li>
</ul></li>
<li>Fix regression in interrupt mode:
<ul>
<li>Add a wait on TXE flag in SPI_CloseTx_ISR() and in SPI_CloseTxRx_ISR()</li>
<li>Add to manage properly the overrun flag in SPI_CloseRxTx_ISR() and SPI_CloseRx_ISR()</li>
</ul></li>
</ul></li>
</ul></li>
<li><strong>HAL DMA2D</strong> update
<ul>
<li>Update the HAL_DMA2D_DeInit() function to:
<ul>
<li>Abort transfer in case of ongoing DMA2D transfer</li>
<li>Reset DMA2D control registers</li>
</ul></li>
<li>Update HAL_DMA2D_Abort() to disable DMA2D interrupts after stopping transfer</li>
<li>Optimize HAL_DMA2D_IRQHandler() by reading status registers only once</li>
<li>Update HAL_DMA2D_ProgramLineEvent() function to:
<ul>
<li>Return HAL error state in case of wrong line value</li>
<li>Enable line interrupt after setting the line watermark configuration</li>
</ul></li>
<li>Add new HAL_DMA2D_CLUTLoad() and HAL_DMA2D_CLUTLoad_IT() functions to start DMA2D CLUT loading
<ul>
<li>HAL_DMA2D_CLUTLoading_Abort() function to abort the DMA2D CLUT loading</li>
<li>HAL_DMA2D_CLUTLoading_Suspend() function to suspend the DMA2D CLUT loading</li>
<li>HAL_DMA2D_CLUTLoading_Resume() function to resume the DMA2D CLUT loading</li>
</ul></li>
<li>Add new DMA2D dead time management:
<ul>
<li>HAL_DMA2D_EnableDeadTime() function to enable DMA2D dead time feature</li>
<li>HAL_DMA2D_DisableDeadTime() function to disable DMA2D dead time feature</li>
<li>HAL_DMA2D_ConfigDeadTime() function to configure dead time</li>
</ul></li>
<li>Update the name of DMA2D Input/Output color mode defines to be more clear for user (DMA2D_INPUT_XXX for input layers Colors, DMA2D_OUTPUT_XXX for output framebuffer Colors)</li>
</ul></li>
<li><strong>HAL LTDC</strong> update
<ul>
<li>Update HAL_LTDC_IRQHandler() to manage the case of reload interrupt</li>
<li>Add new callback API HAL_LTDC_ReloadEventCallback()</li>
<li>Add HAL_LTDC_Reload() to configure LTDC reload feature</li>
<li>Add new No Reload LTDC variant APIs
<ul>
<li>HAL_LTDC_ConfigLayer_NoReload() to configure the LTDC Layer according to the specified without reloading</li>
<li>HAL_LTDC_SetWindowSize_NoReload() to set the LTDC window size without reloading</li>
<li>HAL_LTDC_SetWindowPosition_NoReload() to set the LTDC window position without reloading</li>
<li>HAL_LTDC_SetPixelFormat_NoReload() to reconfigure the pixel format without reloading</li>
<li>HAL_LTDC_SetAlpha_NoReload() to reconfigure the layer alpha value without reloading</li>
<li>HAL_LTDC_SetAddress_NoReload() to reconfigure the frame buffer Address without reloading</li>
<li>HAL_LTDC_SetPitch_NoReload() to reconfigure the pitch for specific cases</li>
<li>HAL_LTDC_ConfigColorKeying_NoReload() to configure the color keying without reloading</li>
<li>HAL_LTDC_EnableColorKeying_NoReload() to enable the color keying without reloading</li>
<li>HAL_LTDC_DisableColorKeying_NoReload() to disable the color keying without reloading</li>
<li>HAL_LTDC_EnableCLUT_NoReload() to enable the color lookup table without reloading</li>
<li>HAL_LTDC_DisableCLUT_NoReload() to disable the color lookup table without reloading</li>
<li><u> Note:</u> Variant functions with “_NoReload” post fix allows to set the LTDC configuration/settings without immediate reload. This is useful in case when the program requires to modify several LTDC settings (on one or both layers) then applying (reload) these settings in one shot by calling the function “HAL_LTDC_Reload”</li>
</ul></li>
</ul></li>
<li><strong>HAL RTC</strong> update
<ul>
<li>Add new timeout implementation based on cpu cycles for ALRAWF, ALRBWF and WUTWF flags</li>
</ul></li>
<li><strong>HAL SAI</strong> update
<ul>
<li>Update SAI state in case of TIMEOUT error within the HAL_SAI_Transmit() / HAL_SAI_Receive()</li>
<li>Update HAL_SAI_IRQHandler:
<ul>
<li>Add error management in case DMA errors through XferAbortCallback() and HAL_DMA_Abort_IT()</li>
<li>Add error management in case of IT</li>
</ul></li>
<li>Move SAI_BlockSynchroConfig() and SAI_GetInputClock() functions to stm32f4xx_hal_sai.c/.h files (extension files are kept empty for projects compatibility reason)</li>
</ul></li>
<li><strong>HAL DCMI</strong> update
<ul>
<li>Rename DCMI_DMAConvCplt to DCMI_DMAXferCplt</li>
<li>Update HAL_DCMI_Start_DMA() function to Enable the DCMI peripheral</li>
<li>Add new timeout implementation based on cpu cycles for DCMI stop</li>
<li>Add HAL_DCMI_Suspend() function to suspend DCMI capture</li>
<li>Add HAL_DCMI_Resume() function to resume capture after DCMI suspend</li>
<li>Update lock mechanism for DCMI process</li>
<li>Update HAL_DCMI_IRQHandler() function to:
<ul>
<li>Add error management in case DMA errors through XferAbortCallback() and HAL_DMA_Abort_IT()</li>
<li>Optimize code by using direct register read</li>
</ul></li>
</ul></li>
<li><strong>HAL DMA</strong> update
<ul>
<li>Add new APIs HAL_DMA_RegisterCallback() and HAL_DMA_UnRegisterCallback to register/unregister the different callbacks identified by the enum typedef HAL_DMA_CallbackIDTypeDef</li>
<li>Add new API HAL_DMA_Abort_IT() to abort DMA transfer under interrupt context
<ul>
<li>The new registered Abort callback is called when DMA transfer abortion is completed</li>
</ul></li>
<li>Add the check of compatibility between FIFO threshold level and size of the memory burst in the HAL_DMA_Init() API</li>
<li>Add new Error Codes: HAL_DMA_ERROR_PARAM, HAL_DMA_ERROR_NO_XFER and HAL_DMA_ERROR_NOT_SUPPORTED</li>
<li>Remove all DMA states related to MEM0/MEM1 in HAL_DMA_StateTypeDef</li>
</ul></li>
<li><strong>HAL IWDG</strong> update
<ul>
<li>Overall rework of the driver for a more efficient implementation
<ul>
<li>Remove the following APIs:
<ul>
<li>HAL_IWDG_Start()</li>
<li>HAL_IWDG_MspInit()</li>
<li>HAL_IWDG_GetState()</li>
</ul></li>
</ul></li>
<li>Update implementation:
<ul>
<li>HAL_IWDG_Init(): this function insures the configuration and the start of the IWDG counter</li>
<li>HAL_IWDG_Refresh(): this function insures the reload of the IWDG counter</li>
</ul></li>
<li>Refer to the following example to identify the changes: IWDG_Example</li>
</ul></li>
<li><strong>HAL LPTIM</strong> update
<ul>
<li>Update HAL_LPTIM_TimeOut_Start_IT() and HAL_LPTIM_Counter_Start_IT( ) APIs to configure WakeUp Timer EXTI interrupt to be able to wakeup MCU from low power mode by pressing the EXTI line.</li>
<li>Update HAL_LPTIM_TimeOut_Stop_IT() and HAL_LPTIM_Counter_Stop_IT( ) APIs to disable WakeUp Timer EXTI interrupt.</li>
</ul></li>
<li><strong>HAL NOR</strong> update
<ul>
<li>Update NOR_ADDR_SHIFT macro implementation</li>
</ul></li>
<li><strong>HAL PCD</strong> update
<ul>
<li>Update HAL_PCD_IRQHandler() to get HCLK frequency before setting TRDT value</li>
</ul></li>
<li><strong>HAL QSPI</strong> update
<ul>
<li>Update to manage QSPI error management during DMA process</li>
<li>Improve the DMA transmit process by using QSPI TC interrupt instead of waiting loop on TC flag under DMA ISR</li>
<li>These two improvements require the following updates on user application:
<ul>
<li>Configure and enable the QSPI IRQ in HAL_QSPI_MspInit() function</li>
<li>In stm32f4xx_it.c file, QSPI_IRQHandler() function: add a call to HAL_QSPI_IRQHandler() function</li>
<li>Add and customize the Error Callback API: HAL_QSPI_ErrorCallback()</li>
</ul></li>
<li>Add the management of non-blocking transfer abort service: HAL_QSPI_Abort_IT(). In this case the user must:
<ul>
<li>Add new callback HAL_QSPI_AbortCpltCallback() to inform user at the end of abort process</li>
<li>A new value of State in the HAL_QSPI_StateTypeDef provides the current state during the abort phase</li>
</ul></li>
<li>Polling management update:
<ul>
<li>The Timeout value user must be estimated for the overall process duration: the Timeout measurement is cumulative.</li>
</ul></li>
<li>Refer to the following examples, which describe the changes:
<ul>
<li>QSPI_ReadWrite_DMA</li>
<li>QSPI_MemoryMapped</li>
<li>QSPI_ExecuteInPlace</li>
</ul></li>
<li>Add two new APIs for the QSPI fifo threshold:
<ul>
<li>HAL_QSPI_SetFifoThreshold(): configure the FIFO threshold of the QSPI</li>
<li>HAL_QSPI_GetFifoThreshold(): give the current FIFO threshold</li>
</ul></li>
<li>Fix wrong data size management in HAL_QSPI_Receive_DMA()</li>
</ul></li>
<li><strong>HAL ADC</strong> update
<ul>
<li>Add new __HAL_ADC_PATH_INTERNAL_VBAT_DISABLE() macro for STM32F42x and STM32F43x devices to provide the possibility to convert VrefInt channel when both VrefInt and Vbat channels are selected.</li>
</ul></li>
<li><strong>HAL SPDIFRX</strong> update
<ul>
<li>Overall driver update for wait on flag management optimization</li>
</ul></li>
<li><strong>HAL WWDG</strong> update
<ul>
<li>Overall rework of the driver for more efficient implementation
<ul>
<li>Remove the following APIs:
<ul>
<li>HAL_WWDG_Start()</li>
<li>HAL_WWDG_Start_IT()</li>
<li>HAL_WWDG_MspDeInit()</li>
<li>HAL_WWDG_GetState()</li>
</ul></li>
<li>Update implementation:
<ul>
<li>HAL_WWDG_Init()
<ul>
<li>A new parameter in the Init Structure: EWIMode</li>
</ul></li>
<li>HAL_WWDG_MspInit()</li>
<li>HAL_WWDG_Refresh()
<ul>
<li>This function insures the reload of the counter</li>
<li>The “counter” parameter has been removed</li>
</ul></li>
<li>HAL_WWDG_IRQHandler()</li>
<li>HAL_WWDG_EarlyWakeupCallback() is the new prototype of HAL_WWDG_WakeUpCallback()</li>
</ul></li>
</ul></li>
<li>Refer to the following example to identify the changes: WWDG_Example</li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section11" aria-hidden="true"> <label for="collapse-section11" aria-hidden="true">V1.4.4 / 22-January-2016</label>
<div>
<h2 id="main-changes-22">Main Changes</h2>
<ul>
<li><strong>HAL Generic</strong> update
<ul>
<li>stm32f4xx_hal_conf_template.h
<ul>
<li>Optimize HSE Startup Timeout value from 5000ms to 100 ms</li>
<li>Add new define LSE_STARTUP_TIMEOUT</li>
<li>Add new define USE_SPI_CRC for code cleanup when the CRC calculation is disabled.</li>
</ul></li>
<li>Update HAL drivers to support MISRA C 2004 rule 10.6</li>
<li>Add new template driver to configure timebase using TIMER :
<ul>
<li>stm32f4xx_hal_timebase_tim_template.c</li>
</ul></li>
</ul></li>
<li><strong>HAL CAN</strong> update
<ul>
<li>Update HAL_CAN_Transmit() and HAL_CAN_Transmit_IT() functions to unlock process when all Mailboxes are busy</li>
</ul></li>
<li><strong>HAL DSI</strong> update
<ul>
<li>Update HAL_DSI_SetPHYTimings() functions to use the correct mask</li>
</ul></li>
<li><strong>HAL UART</strong> update
<ul>
<li>Several update on HAL UART driver to implement the new UART state machine:
<ul>
<li>Add new field in UART_HandleTypeDef structure: “rxState”, UART state information related to Rx Operations</li>
<li>Rename “state” field in UART_HandleTypeDef structure by “gstate”: UART state information related to global Handle management and Tx Operations</li>
<li>Update UART process to manage the new UART states.</li>
<li>Update __HAL_UART_RESET_HANDLE_STATE() macro to handle the new UART state parameters (gState, rxState)</li>
</ul></li>
<li>Update UART_BRR_SAMPLING16() and UART_BRR_SAMPLING8() Macros to fix wrong baudrate calculation.</li>
</ul></li>
<li><strong>HAL IRDA</strong> update
<ul>
<li>Several update on HAL IRDA driver to implement the new UART state machine:
<ul>
<li>Add new field in IRDA_HandleTypeDef structure: “rxState”, IRDA state information related to Rx Operations</li>
<li>Rename “state” field in UART_HandleTypeDef structure by “gstate”: IRDA state information related to global Handle management and Tx Operations</li>
<li>Update IRDA process to manage the new UART states.</li>
<li>Update __HAL_IRDA_RESET_HANDLE_STATE() macro to handle the new IRDA state parameters (gState, rxState)</li>
</ul></li>
<li>Removal of IRDA_TIMEOUT_VALUE define</li>
<li>Update IRDA_BRR() Macro to fix wrong baudrate calculation</li>
</ul></li>
<li><strong>HAL SMARTCARD</strong> update
<ul>
<li>Several update on HAL SMARTCARD driver to implement the new UART state machine:
<ul>
<li>Add new field in SMARTCARD_HandleTypeDef structure: “rxState”, SMARTCARDstate information related to Rx Operations</li>
<li>Rename “state” field in UART_HandleTypeDef structure by “gstate”: SMARTCARDstate information related to global Handle management and Tx Operations</li>
<li>Update SMARTCARD process to manage the new UART states.</li>
<li>Update __HAL_SMARTCARD_RESET_HANDLE_STATE() macro to handle the new SMARTCARD state parameters (gState, rxState)</li>
</ul></li>
<li>Update SMARTCARD_BRR() macro to fix wrong baudrate calculation</li>
</ul></li>
<li><strong>HAL RCC</strong> update
<ul>
<li>Add new default define value for HSI calibration “RCC_HSICALIBRATION_DEFAULT”</li>
<li>Optimize Internal oscillators and PLL startup timeout</li>
<li><p>Update to avoid the disable for HSE/LSE oscillators before setting the new RCC HSE/LSE configuration and add the following notes in HAL_RCC_OscConfig() API description:</p>
<pre><code>                   * @note   Transitions LSE Bypass to LSE On and LSE On to LSE Bypass are not
                   *             supported by this API. User should request a transition to LSE Off
                   *             first and then LSE On or LSE Bypass.
                   * @note   Transition HSE Bypass to HSE On and HSE On to HSE Bypass are not
                   *             supported by this API. User should request a transition to HSE Off
                   *             first and then HSE On or HSE Bypass.</code></pre></li>
<li>Optimize the HAL_RCC_ClockConfig() API implementation.</li>
</ul></li>
<li><strong>HAL DMA2D</strong> update
<ul>
<li>Update HAL_DMA2D_Abort() Function to end current DMA2D transfer properly</li>
<li>Update HAL_DMA2D_PollForTransfer() function to add poll for background CLUT loading (layer 0 and layer 1).</li>
<li>Update HAL_DMA2D_PollForTransfer() to set the corresponding ErrorCode in case of error occurrence</li>
<li>Update HAL_DMA2D_ConfigCLUT() function to fix wrong CLUT size and color mode settings</li>
<li>Removal of useless macro __HAL_DMA2D_DISABLE()</li>
<li>Update HAL_DMA2D_Suspend() to manage correctly the case where no transfer is on going</li>
<li>Update HAL_DMA2D_Resume() to manage correctly the case where no transfer is on going</li>
<li>Update HAL_DMA2D_Start_IT() to enable all required interrupts before enabling the transfer.</li>
<li>Add HAL_DMA2D_CLUTLoad_IT() Function to allow loading a CLUT with interruption model.</li>
<li><p>Update HAL_DMA2D_IRQHandler() to manage the following cases :</p>
<ul>
<li>CLUT transfer complete</li>
<li>CLUT access error</li>
<li>Transfer watermark reached</li>
</ul></li>
<li>Add new Callback APIs:
<ul>
<li>HAL_DMA2D_LineEventCallback() to signal a transfer watermark reached event</li>
<li>HAL_DMA2D_CLUTLoadingCpltCallback() to signal a CLUT loading complete event</li>
</ul></li>
<li>Miscellaneous Improvement:
<ul>
<li>Add “HAL_DMA2D_ERROR_CAE” new define for CLUT Access error management.</li>
<li>Add “assert_param” used for parameters check is now done on the top of the exported functions : before locking the process using __HAL_LOCK</li>
</ul></li>
</ul></li>
<li><strong>HAL I2C</strong> update
<ul>
<li>Add support of I2C repeated start feature:
<ul>
<li>With the following new API’s
<ul>
<li>HAL_I2C_Master_Sequential_Transmit_IT()</li>
<li>HAL_I2C_Master_Sequential_Receive_IT()</li>
<li>HAL_I2C_Master_Abort_IT()</li>
<li>HAL_I2C_Slave_Sequential_Transmit_IT()</li>
<li>HAL_I2C_Slave_Sequential_Receive_IT()</li>
<li>HAL_I2C_EnableListen_IT()</li>
<li>HAL_I2C_DisableListen_IT()</li>
</ul></li>
</ul></li>
<li>Add new user callbacks:
<ul>
<li>HAL_I2C_ListenCpltCallback()</li>
<li>HAL_I2C_AddrCallback()</li>
</ul></li>
<li>Update to generate STOP condition when a acknowledge failure error is detected</li>
<li>Several update on HAL I2C driver to implement the new I2C state machine:
<ul>
<li>Add new API to get the I2C mode: HAL_I2C_GetMode()</li>
<li>Update I2C process to manage the new I2C states.</li>
</ul></li>
<li>Fix wrong behaviour in single byte transmission</li>
<li>Update I2C_WaitOnFlagUntilTimeout() to manage the NACK feature.</li>
<li>Update I2C transmission process to support the case data size equal 0</li>
</ul></li>
<li><strong>HAL FMPI2C</strong> update
<ul>
<li>Add support of FMPI2C repeated start feature:
<ul>
<li>With the following new API’s
<ul>
<li>HAL_FMPI2C_Master_Sequential_Transmit_IT()</li>
<li>HAL_FMPI2C_Master_Sequential_Receive_IT()</li>
<li>HAL_FMPI2C_Master_Abort_IT()</li>
<li>HAL_FMPI2C_Slave_Sequential_Transmit_IT()</li>
<li>HAL_FMPI2C_Slave_Sequential_Receive_IT()</li>
<li>HAL_FMPI2C_EnableListen_IT()</li>
<li>HAL_FMPI2C_DisableListen_IT()</li>
</ul></li>
<li>Add new user callbacks:
<ul>
<li>HAL_FMPI2C_ListenCpltCallback()</li>
<li>HAL_FMPI2C_AddrCallback()</li>
</ul></li>
<li>Several update on HAL I2C driver to implement the new I2C state machine:
<ul>
<li>Add new API to get the FMPI2C mode: HAL_FMPI2C_GetMode()</li>
<li>Update FMPI2C process to manage the new FMPI2C states.</li>
</ul></li>
</ul></li>
</ul></li>
<li><strong>HAL SPI</strong> update
<ul>
<li>Major Update to improve performance in polling/interrupt mode to reach max frequency:
<ul>
<li>Polling mode :
<ul>
<li>Replace use of SPI_WaitOnFlagUnitTimeout() funnction by “if” statement to check on RXNE/TXE flags while transferring data.</li>
<li>Use API data pointer instead of SPI handle data pointer.</li>
<li>Use a Goto implementation instead of “if..else” statements.</li>
</ul></li>
<li>Interrupt mode
<ul>
<li>Minimize access on SPI registers.</li>
<li>Split the SPI modes into dedicated static functions to minimize checking statements under HAL_IRQHandler():
<ul>
<li>1lines/2lines modes</li>
<li>8 bit/ 16 bits data formats</li>
<li>CRC calculation enabled/disabled.</li>
</ul></li>
<li>Remove waiting loop under ISR when closing the communication.</li>
</ul></li>
<li>All modes:
<ul>
<li>Adding switch USE_SPI_CRC to minimize number of statements when CRC calculation is disabled.</li>
<li>Update Timeout management to check on global process.</li>
<li>Update Error code management in all processes.</li>
</ul></li>
</ul></li>
<li>Add note to the max frequencies reached in all modes.</li>
<li>Add note about Master Receive mode restrictions :
<ul>
<li>Master Receive mode restriction:
<div data-align="center">
(#) In Master unidirectional receive-only mode (MSTR =1, BIDIMODE=0, RXONLY=0) or bidirectional receive mode (MSTR=1, BIDIMODE=1, BIDIOE=0), to ensure that the SPI does not initiate a new transfer the following procedure has to be respected:<br />
(##) HAL_SPI_DeInit()<br />
(##) HAL_SPI_Init()
</div></li>
</ul></li>
</ul></li>
<li><strong>HAL SAI</strong> update
<ul>
<li>Update for proper management of the external synchronization input selection
<ul>
<li>update of HAL_SAI_Init () function</li>
<li>update definition of SAI_Block_SyncExt and SAI_Block_Synchronization groups</li>
</ul></li>
<li>Update SAI_SLOTACTIVE_X defines values</li>
<li>Update HAL_SAI_Init() function for proper companding mode management</li>
<li>Update SAI_Transmit_ITxxBit() functions to add the check on transfer counter before writing new data to SAIx_DR registers</li>
<li>Update SAI_FillFifo() function to avoid issue when the number of data to transmit is smaller than the FIFO size</li>
<li>Update HAL_SAI_EnableRxMuteMode() function for proper mute management</li>
<li>Update SAI_InitPCM() function to support 24bits configuration</li>
</ul></li>
<li><strong>HAL ETH</strong> update
<ul>
<li>Removal of ETH MAC debug register defines</li>
</ul></li>
<li><strong>HAL FLASH</strong> update
<ul>
<li>Update FLASH_MassErase() function to apply correctly voltage range parameter</li>
</ul></li>
<li><strong>HAL I2S</strong> update
<ul>
<li>Update I2S_DMATxCplt() and I2S_DMARxCplt() to manage properly FullDuplex mode without any risk of missing data.</li>
</ul></li>
<li><strong>LL FMC</strong> update
<ul>
<li>Update the FMC_NORSRAM_Init() function to use BurstAccessMode field properly</li>
</ul></li>
<li><strong>LL FSMC</strong> update
<ul>
<li>Update the FSMC_NORSRAM_Init() function to use BurstAccessMode field properly</li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section10" aria-hidden="true"> <label for="collapse-section10" aria-hidden="true">V1.4.3 / 11-December-2015</label>
<div>
<h2 id="main-changes-23">Main Changes</h2>
<ul>
<li><strong>HAL Generic</strong> update
<ul>
<li>Update HAL weak empty callbacks to prevent unused argument compilation warnings with some compilers by calling the following line:
<ul>
<li>UNUSED(hppp);</li>
</ul></li>
<li>STM32Fxxx_User_Manual.chm files regenerated for HAL V1.4.3</li>
</ul></li>
<li><strong>HAL ETH</strong> update
<ul>
<li>Update HAL_ETH_Init() function to add timeout on the Software reset management</li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section9" aria-hidden="true"> <label for="collapse-section9" aria-hidden="true">V1.4.2 / 10-November-2015</label>
<div>
<h2 id="main-changes-24">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation<br />
</li>
<li><strong>One change done on the HAL CRYP requires an update on the application code based on HAL V1.4.1</strong>
<ul>
<li>Update HAL_CRYP_DESECB_Decrypt() API to invert pPlainData and pCypherData parameters<br />
</li>
</ul></li>
<li><strong>HAL generic</strong> update
<ul>
<li>Update HAL weak empty callbacks to prevent unused argument compilation warnings with some compilers by calling the following line:
<ul>
<li>UNUSED(hppp);<br />
</li>
</ul></li>
</ul></li>
<li><strong>HAL CORTEX</strong> update
<ul>
<li>Remove duplication for __HAL_CORTEX_SYSTICKCLK_CONFIG() macro<br />
</li>
</ul></li>
<li><strong>HAL HASH</strong> update
<ul>
<li>Rename HAL_HASH_STATETypeDef to HAL_HASH_StateTypeDef</li>
<li>Rename HAL_HASH_PhaseTypeDef to HAL_HASH_PhaseTypeDef</li>
</ul></li>
<li><strong>HAL RCC</strong> update
<ul>
<li>Add new macros __HAL_RCC_PPP_IS_CLK_ENABLED() to check on Clock enable/disable status</li>
<li>Update __HAL_RCC_USB_OTG_FS_CLK_DISABLE() macro to remove the disable for the SYSCFG</li>
<li>Update HAL_RCC_MCOConfig() API to use new defines for the GPIO Speed</li>
<li>Generic update to improve the PLL VCO min value(100MHz): PLLN, PLLI2S and PLLSAI min value is 50 instead of 192</li>
</ul></li>
<li><strong>HAL FLASH</strong> update
<ul>
<li>__HAL_FLASH_INSTRUCTION_CACHE_RESET() macro: update to reset ICRST bit in the ACR register after setting it.</li>
<li>Update to support until 15 FLASH wait state (FLASH_LATENCY_15) for STM32F446xx devices</li>
</ul></li>
<li><strong>HAL CRYP</strong> update
<ul>
<li>Update HAL_CRYP_DESECB_Decrypt() API to fix the inverted pPlainData and pCypherData parameters issue</li>
</ul></li>
<li><strong>HAL I2S</strong> update
<ul>
<li>Update HAL_I2S_Init() API to call __HAL_RCC_I2S_CONFIG() macro when external I2S clock is selected</li>
</ul></li>
<li><strong>HAL LTDC</strong> update
<ul>
<li>Update HAL_LTDC_SetWindowPosition() API to configure Immediate reload register instead of vertical blanking reload register.</li>
</ul></li>
<li><strong>HAL TIM</strong> update
<ul>
<li>Update HAL_TIM_ConfigClockSource() API to check only the required parameters</li>
</ul></li>
<li><strong>HAL NAND</strong> update
<ul>
<li>Update HAL_NAND_Read_Page()/HAL_NAND_Write_Page()/HAL_NAND_Read_SpareArea() APIs to manage correctly the NAND Page access</li>
</ul></li>
<li><strong>HAL CAN</strong> update
<ul>
<li>Update to use “=” instead of “|=” to clear flags in the MSR, TSR, RF0R and RF1R registers</li>
</ul></li>
<li><strong>HAL HCD</strong> update
<ul>
<li>Fix typo in __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() macro implementation</li>
</ul></li>
<li><strong>HAL PCD</strong> update
<ul>
<li>Update HAL_PCD_IRQHandler() API to avoid issue when DMA mode enabled for Status Phase IN stage</li>
</ul></li>
<li><strong>LL FMC</strong> update
<ul>
<li>Update the FMC_NORSRAM_Extended_Timing_Init() API to remove the check on CLKDIvison and DataLatency parameters</li>
<li>Update the FMC_NORSRAM_Init() API to add a check on the PageSize parameter for STM32F42/43xx devices</li>
</ul></li>
<li><strong>LL FSMC</strong> update
<ul>
<li>Update the FSMC_NORSRAM_Extended_Timing_Init() API to remove the check on CLKDIvison and DataLatency parameters</li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section8" aria-hidden="true"> <label for="collapse-section8" aria-hidden="true">V1.4.1 / 09-October-2015</label>
<div>
<h2 id="main-changes-25">Main Changes</h2>
<ul>
<li><strong>HAL DSI</strong> update
<ul>
<li>Update TCCR register assigned value in HAL_DSI_ConfigHostTimeouts() function</li>
<li>Update WPCR register assigned value in HAL_DSI_Init(), HAL_DSI_SetSlewRateAndDelayTuning(), HAL_DSI_SetSlewRateAndDelayTuning(), HAL_DSI_SetLowPowerRXFilter() / HAL_DSI_SetSDD(), HAL_DSI_SetLanePinsConfiguration(), HAL_DSI_SetPHYTimings(), HAL_DSI_ForceTXStopMode(), HAL_DSI_ForceRXLowPower(), HAL_DSI_ForceDataLanesInRX(), HAL_DSI_SetPullDown() and HAL_DSI_SetContentionDetectionOff() functions</li>
<li>Update DSI_HS_PM_ENABLE define value</li>
<li>Implement workaround for the hardware limitation: “The time to activate the clock between HS transmissions is not calculated correctly”</li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section7" aria-hidden="true"> <label for="collapse-section7" aria-hidden="true">V1.4.0 / 14-August-2015</label>
<div>
<h2 id="main-changes-26">Main Changes</h2>
<ul>
<li>Add support of <strong>STM32F469xx, STM32F479xx, STM32F410Cx, STM32F410Rx and STM32F410Tx</strong> devices</li>
<li>General updates to fix known defects and enhancements implementation</li>
<li>Add new HAL drivers for <strong>DSI</strong> and <strong>LPTIM</strong> peripherals</li>
<li><strong>HAL ADC</strong> update
<ul>
<li>Rename ADC_CLOCKPRESCALER_PCLK_DIV2 define to ADC_CLOCK_SYNC_PCLK_DIV2</li>
<li>Rename ADC_CLOCKPRESCALER_PCLK_DIV4 define to ADC_CLOCK_SYNC_PCLK_DIV4</li>
<li>Rename ADC_CLOCKPRESCALER_PCLK_DIV6 define to ADC_CLOCK_SYNC_PCLK_DIV6</li>
<li>Rename ADC_CLOCKPRESCALER_PCLK_DIV8 define to ADC_CLOCK_SYNC_PCLK_DIV8</li>
</ul></li>
<li><strong>HAL CORTEX</strong> update
<ul>
<li>Add specific API for MPU management
<ul>
<li>add MPU_Region_InitTypeDef structure</li>
<li>add new function HAL_MPU_ConfigRegion()</li>
</ul></li>
</ul></li>
<li><strong>HAL DMA</strong> update
<ul>
<li>Overall driver update for code optimization
<ul>
<li>add StreamBaseAddress and StreamIndex new fields in the DMA_HandleTypeDef structure</li>
<li>add DMA_Base_Registers private structure</li>
<li>add static function DMA_CalcBaseAndBitshift()</li>
<li>update HAL_DMA_Init() function to use the new added static function</li>
<li>update HAL_DMA_DeInit() function to optimize clear flag operations</li>
<li>update HAL_DMA_Start_IT() function to optimize interrupts enable</li>
<li>update HAL_DMA_PollForTransfer() function to optimize check on flags</li>
<li>update HAL_DMA_IRQHandler() function to optimize interrupt flag management</li>
</ul></li>
</ul></li>
<li><strong>HAL FLASH</strong> update
<ul>
<li>update HAL_FLASH_Program_IT() function by removing the pending flag clear</li>
<li>update HAL_FLASH_IRQHandler() function to improve erase operation procedure</li>
<li>update FLASH_WaitForLastOperation() function by checking on end of operation flag</li>
</ul></li>
<li><strong>HAL GPIO</strong> update
<ul>
<li>Rename GPIO_SPEED_LOW define to GPIO_SPEED_FREQ_LOW</li>
<li>Rename GPIO_SPEED_MEDIUM define to GPIO_SPEED_FREQ_MEDIUM</li>
<li>Rename GPIO_SPEED_FAST define to GPIO_SPEED_FREQ_HIGH</li>
<li>Rename GPIO_SPEED_HIGH define to GPIO_SPEED_FREQ_VERY_HIGH</li>
</ul></li>
<li><strong>HAL I2S</strong> update
<ul>
<li>Move I2S_Clock_Source defines to extension file to properly add the support of STM32F410xx devices</li>
</ul></li>
<li><strong>HAL LTDC</strong> update
<ul>
<li>rename HAL_LTDC_LineEvenCallback() function to HAL_LTDC_LineEventCallback()</li>
<li>add new function HAL_LTDC_SetPitch()</li>
<li>add new functions HAL_LTDC_StructInitFromVideoConfig() and HAL_LTDC_StructInitFromAdaptedCommandConfig() applicable only to STM32F469xx and STM32F479xx devices</li>
</ul></li>
<li><strong>HAL PWR</strong> update
<ul>
<li>move __HAL_PWR_VOLTAGESCALING_CONFIG() macro to extension file</li>
<li>move PWR_WAKEUP_PIN2 define to extension file</li>
<li>add PWR_WAKEUP_PIN3 define, applicable only to STM32F10xx devices</li>
<li>add new functions HAL_PWREx_EnableWakeUpPinPolarityRisingEdge() and HAL_PWREx_EnableWakeUpPinPolarityFallingEdge(), applicable only to STM32F469xx and STM32F479xx devices</li>
</ul></li>
<li><strong>HAL RTC</strong> update
<ul>
<li>Update HAL_RTCEx_SetWakeUpTimer() and HAL_RTCEx_SetWakeUpTimer_IT() functions to properly check on the WUTWF flag</li>
</ul></li>
<li><strong>HAL TIM</strong> update
<ul>
<li>add new defines TIM_SYSTEMBREAKINPUT_HARDFAULT, TIM_SYSTEMBREAKINPUT_PVD and TIM_SYSTEMBREAKINPUT_HARDFAULT_PVD, applicable only to STM32F410xx devices</li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section6" aria-hidden="true"> <label for="collapse-section6" aria-hidden="true">V1.3.2 / 26-June-2015</label>
<div>
<h2 id="main-changes-27">Main Changes</h2>
<ul>
<li>General updates to fix known defects and enhancements implementation</li>
<li><strong>One changes done on the HAL may require an update on the application code based on HAL V1.3.1</strong>
<ul>
<li>HASH IT process: update to call the HAL_HASH_InCpltCallback() at the end of the complete buffer instead of every each 512 bits</li>
</ul></li>
<li><strong>HAL RCC</strong> update
<ul>
<li>HAL_RCCEx_PeriphCLKConfig() updates:
<ul>
<li>Update the LSE check condition after backup domain reset: update to check LSE ready flag when LSE oscillator is already enabled instead of check on LSE oscillator only when LSE is used as RTC clock source</li>
<li>Use the right macro to check the PLLI2SQ parameters</li>
</ul></li>
</ul></li>
<li><strong>HAL RTC</strong> update
<ul>
<li>__HAL_RTC_TAMPER_TIMESTAMP_EXTI_GET_FLAG() macro: fix implementation issue</li>
<li>__HAL_RTC_ALARM_GET_IT(), __HAL_RTC_ALARM_CLEAR_FLAG(), __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(), __HAL_RTC_TIMESTAMP_CLEAR_FLAG() and __HAL_RTC_TAMPER_CLEAR_FLAG() macros implementation changed: remove unused cast</li>
<li>IS_RTC_TAMPER() macro: update to use literal instead of hardcoded value</li>
<li>Add new parameter SecondFraction in RTC_TimeTypeDef structure</li>
<li>HAL_RTC_GetTime() API update to support the new parameter SecondFraction</li>
</ul></li>
<li><strong>HAL ADC</strong> update
<ul>
<li>Add new literal: ADC_INJECTED_SOFTWARE_START to be used as possible value for the ExternalTrigInjecConvEdge parameter in the ADC_InitTypeDef structure to select the ADC software trigger mode.</li>
</ul></li>
<li><strong>HAL FLASH</strong> update
<ul>
<li>FLASH_OB_GetRDP() API update to return uint8_t instead of FlagStatus</li>
<li>__HAL_FLASH_GET_LATENCY() new macro add to get the flash latency</li>
</ul></li>
<li><strong>HAL SPI</strong> update
<ul>
<li>Fix the wrong definition of HAL_SPI_ERROR_FLAG literal</li>
</ul></li>
<li><strong>HAL I2S</strong> update
<ul>
<li>HAL_I2S_Transmit() API update to check on busy flag only for I2S slave mode</li>
</ul></li>
<li><strong>HAL CRC</strong> update
<ul>
<li>__HAL_CRC_SET_IDR() macro implementation change to use WRITE_REG() instead of MODIFY_REG()</li>
</ul></li>
<li><strong>HAL DMA2D</strong> update
<ul>
<li>HAL_DMA2D_ConfigLayer() API update to use “=” instead of “|=” to erase BGCOLR and FGCOLR registers before setting the new configuration</li>
</ul></li>
<li><strong>HAL HASH</strong> update
<ul>
<li>HAL_HASH_<strong>MODE</strong>_Start_IT() (<strong>MODE</strong> stands for MD5, SHA1, SHA224 and SHA36) updates:
<ul>
<li>Fix processing fail for small input buffers</li>
<li>Update to unlock the process and call return HAL_OK at the end of HASH processing to avoid incorrectly repeating software</li>
<li>Update to properly manage the HashITCounter</li>
<li>Update to call the HAL_HASH_InCpltCallback() at the end of the complete buffer instead of every each 512 bits</li>
</ul></li>
<li>__HAL_HASH_GET_FLAG() update to check the right register when the DINNE flag is selected</li>
<li>HAL_HASH_SHA1_Accumulate() updates:
<ul>
<li>Add a call to the new IS_HASH_SHA1_BUFFER_SIZE() macro to check the size parameter.</li>
<li>Add the following note in API description
<ul>
<li><span class="citation" data-cites="note">@note</span> Input buffer size in bytes must be a multiple of 4 otherwise the digest computation is corrupted.</li>
</ul></li>
</ul></li>
</ul></li>
<li><strong>HAL RTC</strong> update
<ul>
<li>Update to define hardware independent literals names:
<ul>
<li>Rename RTC_TAMPERPIN_PC13 by RTC_TAMPERPIN_DEFAULT</li>
<li>Rename RTC_TAMPERPIN_PA0 by RTC_TAMPERPIN_POS1</li>
<li>Rename RTC_TAMPERPIN_PI8 by RTC_TAMPERPIN_POS1</li>
<li>Rename RTC_TIMESTAMPPIN_PC13 by RTC_TIMESTAMPPIN_DEFAULT</li>
<li>Rename RTC_TIMESTAMPPIN_PA0 by RTC_TIMESTAMPPIN_POS1</li>
<li>Rename RTC_TIMESTAMPPIN_PI8 by RTC_TIMESTAMPPIN_POS1</li>
</ul></li>
</ul></li>
<li><strong>HAL ETH</strong> update
<ul>
<li>Remove duplicated IS_ETH_DUPLEX_MODE() and IS_ETH_RX_MODE() macros</li>
<li>Remove illegal space ETH_MAC_READCONTROLLER_FLUSHING macro</li>
<li>Update ETH_MAC_READCONTROLLER_XXX defined values (XXX can be IDLE, READING_DATA and READING_STATUS)</li>
</ul></li>
<li><strong>HAL PCD</strong> update
<ul>
<li>HAL_PCD_IRQHandler API: fix the bad Configuration of Turnaround Time</li>
</ul></li>
<li><strong>HAL HCD</strong> update
<ul>
<li>Update to use local variable in USB Host channel re-activation</li>
</ul></li>
<li><strong>LL FMC</strong> update
<ul>
<li>FMC_SDRAM_SendCommand() API: remove the following line: return HAL_ERROR;</li>
</ul></li>
<li><strong>LL USB</strong> update
<ul>
<li>USB_FlushTxFifo API: update to flush all Tx FIFO</li>
<li>Update to use local variable in USB Host channel re-activation</li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section5" aria-hidden="true"> <label for="collapse-section5" aria-hidden="true">V1.3.1 / 25-Mars-2015</label>
<div>
<h2 id="main-changes-28">Main Changes</h2>
<ul>
<li><strong>HAL PWR</strong> update
<ul>
<li>Fix compilation issue with STM32F417xx product: update <strong>STM32F17xx</strong> by <strong>STM32F417xx</strong></li>
</ul></li>
<li><strong>HAL SPI</strong> update
<ul>
<li>Remove unused variable to avoid warning with TrueSTUDIO</li>
</ul></li>
<li><strong>HAL I2C</strong> update
<ul>
<li>I2C Polling/IT/DMA processes: move the wait loop on busy flag at the top of the processes, to ensure that software not perform any write access to I2C_CR1 register before hardware clearing STOP bit and to avoid also the waiting loop on BUSY flag under I2C/DMA ISR.</li>
<li>Update busy flag Timeout value</li>
<li>I2C Master Receive Processes update to disable ACK before generate the STOP</li>
</ul></li>
<li><strong>HAL DAC</strong> update
<ul>
<li>Fix V1.3.0 regression issue with DAC software trigger configuration</li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section4" aria-hidden="true"> <label for="collapse-section4" aria-hidden="true">V1.3.0 / 09-Mars-2015</label>
<div>
<h2 id="main-changes-29">Main Changes</h2>
<ul>
<li>Add support of <strong>STM32F446xx</strong> devices</li>
<li>General updates to fix known defects and enhancements implementation</li>
<li>Add new HAL drivers for <strong>CEC</strong>, <strong>QSPI</strong>, <strong>FMPI2C</strong> and <strong>SPDIFRX</strong> peripherals</li>
<li><strong>Two changes done on the HAL requires an update on the application code based on HAL V1.2.0</strong>
<ul>
<li>Overall <strong>SAI driver rework</strong> to have exhaustive support of the peripheral features: details are provided in <strong>HAL SAI</strong> update section below –&gt; <strong>Compatibility with previous version is impacted</strong></li>
<li>CRYP driver updated to support multi instance,so user must ensure that the new parameter Instance is initialized in his application(CRYPHandle.Instance = CRYP)</li>
</ul></li>
<li><strong>HAL Generic</strong> update
<ul>
<li>stm32f4xx_hal_def.h
<ul>
<li>Remove NULL definition and add include for stdio.h</li>
</ul></li>
<li>stm32_hal_legacy.h
<ul>
<li>Update method to manage deference in alias implementation between all STM32 families</li>
</ul></li>
<li>stm32f4xx_hal_ppp.c
<ul>
<li>HAL_PPP_Init(): update to force the HAL_PPP_STATE_RESET before calling the HAL_PPP_MspInit()</li>
</ul></li>
</ul></li>
<li><strong>HAL RCC</strong> update
<ul>
<li>Add new function HAL_RCCEx_GetPeriphCLKFreq()</li>
<li>Move RCC_PLLInitTypeDef structure to extension file and add the new PLLR field specific to STM32F446xx devices</li>
<li>Move the following functions to extension file and add a __weak attribute in generic driver : this update is related to new system clock source (PLL/PLLR) added and only available for STM32F44xx devices
<ul>
<li>HAL_RCC_OscConfig()</li>
<li>HAL_RCC_GetSysClockFreq()</li>
<li>HAL_RCC_GetOscConfig()</li>
</ul></li>
<li>Move the following macro to extension file as they have device dependent implementation
<ul>
<li>__HAL_RCC_PLL_CONFIG()</li>
<li>__HAL_RCC_PLLI2S_CONFIG()</li>
<li>__HAL_RCC_I2S_CONFIG()</li>
</ul></li>
<li>Add new structure RCC_PLLI2SInitTypeDef containing new PLLI2S division factors used only w/ STM32F446xx devices</li>
<li>Add new structure RCC_PLLSAIInitTypeDef containing new PLLSAI division factors used only w/ STM32F446xx devices</li>
<li>Add new RCC_PeriphCLKInitTypeDef to support the peripheral source clock selection for (I2S, SAI, SDIO, FMPI2C, CEC, SPDIFRX and CLK48)</li>
<li>Update the HAL_RCCEx_PeriphCLKConfig() and HAL_RCCEx_GetPeriphCLKConfig() functions to support the new peripherals Clock source selection</li>
<li>Add __HAL_RCC_PLL_CONFIG() macro (the number of parameter and the implementation depend on the device part number)</li>
<li>Add __HAL_RCC_PLLI2S_CONFIG() macro(the number of parameter and the implementation depend on device part number)</li>
<li>Update __HAL_RCC_PLLSAI_CONFIG() macro to support new PLLSAI factors (PLLSAIM and PLLSAIP)</li>
<li>Add new macros for clock enable/Disable for the following peripherals (CEC, SPDIFRX, SAI2, QUADSPI)</li>
<li>Add the following new macros for clock source selection :
<ul>
<li>__HAL_RCC_SAI1_CONFIG() / __HAL_RCC_GET_SAI1_SOURCE()</li>
<li>__HAL_RCC_SAI2_CONFIG() / __HAL_RCC_GET_SAI2_SOURCE()</li>
<li>__HAL_RCC_I2S1_CONFIG() / __HAL_RCC_GET_I2S1_SOURCE()</li>
<li>__HAL_RCC_I2S2_CONFIG() / __HAL_RCC_GET_I2S2_SOURCE()</li>
<li>__HAL_RCC_CEC_CONFIG() / __HAL_RCC__GET_CEC_SOURCE()</li>
<li>__HAL_RCC_FMPI2C1_CONFIG() / __HAL_RCC_GET_FMPI2C1_SOURCE()</li>
<li>__HAL_RCC_SDIO_CONFIG() / __HAL_RCC_GET_SDIO_SOURCE()</li>
<li>__HAL_RCC_CLK48_CONFIG() / __HAL_RCC_GET_CLK48_SOURCE()</li>
<li>__HAL_RCC_SPDIFRXCLK_CONFIG() / __HAL_RCC_GET_SPDIFRX_SOURCE()</li>
</ul></li>
<li>__HAL_RCC_PPP_CLK_ENABLE(): Implement workaround to cover RCC limitation regarding peripheral enable delay</li>
<li>HAL_RCC_OscConfig() fix issues:
<ul>
<li>Add a check on LSERDY flag when LSE_BYPASS is selected as new state for LSE oscillator.</li>
</ul></li>
<li>Add new possible value RCC_PERIPHCLK_PLLI2S to be selected as PeriphClockSelection parameter in the RCC_PeriphCLKInitTypeDef structure to allow the possibility to output the PLLI2S on MCO without activating the I2S or the SAI.</li>
<li><p>__HAL_RCC_HSE_CONFIG() macro: add the comment below:<br />
* <span class="citation" data-cites="note">@note</span> Transition HSE Bypass to HSE On and HSE On to HSE Bypass are not supported by this macro.<br />
* User should request a transition to HSE Off first and then HSE On or HSE Bypass.</p></li>
<li><p>__HAL_RCC_LSE_CONFIG() macro: add the comment below:<br />
* <span class="citation" data-cites="note">@note</span> Transition LSE Bypass to LSE On and LSE On to LSE Bypass are not supported by this macro.<br />
* User should request a transition to LSE Off first and then LSE On or LSE Bypass.</p></li>
<li>Add the following new macros for PLL source and PLLM selection :
<ul>
<li>__HAL_RCC_PLL_PLLSOURCE_CONFIG()</li>
<li>__HAL_RCC_PLL_PLLM_CONFIG()</li>
</ul></li>
<li>Macros rename:
<ul>
<li>HAL_RCC_OTGHS_FORCE_RESET() by HAL_RCC_USB_OTG_HS_FORCE_RESET()</li>
<li>HAL_RCC_OTGHS_RELEASE_RESET() by HAL_RCC_USB_OTG_HS_RELEASE_RESET()</li>
<li>HAL_RCC_OTGHS_CLK_SLEEP_ENABLE() by HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE()</li>
<li>HAL_RCC_OTGHS_CLK_SLEEP_DISABLE() by HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE()</li>
<li>HAL_RCC_OTGHSULPI_CLK_SLEEP_ENABLE() by HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE()</li>
<li>HAL_RCC_OTGHSULPI_CLK_SLEEP_DISABLE() by HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE()</li>
</ul></li>
<li>Add __HAL_RCC_SYSCLK_CONFIG() new macro to configure the system clock source (SYSCLK)</li>
<li>__HAL_RCC_GET_SYSCLK_SOURCE() updates:
<ul>
<li>Add new RCC Literals:
<ul>
<li>RCC_SYSCLKSOURCE_STATUS_HSI</li>
<li>RCC_SYSCLKSOURCE_STATUS_HSE</li>
<li>RCC_SYSCLKSOURCE_STATUS_PLLCLK</li>
<li>RCC_SYSCLKSOURCE_STATUS_PLLRCLK</li>
</ul></li>
<li>Update macro description to refer to the literals above</li>
</ul></li>
</ul></li>
<li><strong>HAL PWR</strong> update
<ul>
<li>Add new define PWR_WAKEUP_PIN2</li>
<li>Add new API to Control/Get VOS bits of CR register
<ul>
<li>HAL_PWR_HAL_PWREx_ControlVoltageScaling()</li>
<li>HAL_PWREx_GetVoltageRange()</li>
</ul></li>
<li>__HAL_PWR_ VOLTAGESCALING_CONFIG(): Implement workaround to cover VOS limitation delay when PLL is enabled after setting the VOS configuration</li>
</ul></li>
<li><strong>HAL GPIO</strong> update
<ul>
<li>Add the new Alternate functions literals related to remap for <strong>SPI, USART, I2C, SPDIFRX, CEC and QSPI</strong></li>
<li>HAL_GPIO_DeInit(): Update to check if GPIO Pin x is already used in EXTI mode on another GPIO Port before De-Initialize the EXTI registers</li>
</ul></li>
<li><strong>HAL FLASH</strong> update
<ul>
<li>__HAL_FLASH_INSTRUCTION_CACHE_RESET() macro: update to reset ICRST bit in the ACR register after setting it.</li>
<li>__HAL_FLASH_DATA_CACHE_RESET() macro: update to reset DCRST bit in the ACR register after setting it.</li>
</ul></li>
<li><strong>HAL ADC</strong> update
<ul>
<li>Add new literal: ADC_SOFTWARE_START to be used as possible value for the ExternalTrigConv parameter in the ADC_InitTypeDef structure to select the ADC software trigger mode.</li>
<li>IS_ADC_CHANNEL() macro update to don’t assert stop the ADC_CHANNEL_TEMPSENSOR value</li>
<li>HAL_ADC_PollForConversion(): update to manage particular case when ADC configured in DMA mode and ADC sequencer with several ranks and polling for end of each conversion</li>
<li>HAL_ADC_Start()/HAL_ADC_Start_IT() /HAL_ADC_Start_DMA() update:
<ul>
<li>unlock the process before starting the ADC software conversion.</li>
<li>Optimize the ADC stabilization delays</li>
</ul></li>
<li>__HAL_ADC_GET_IT_SOURCE() update macro implementation</li>
<li>Add more details in ‘How to use this driver’ section</li>
</ul></li>
<li><strong>HAL DAC</strong> update
<ul>
<li>Add new macro to check if the specified DAC interrupt source is enabled or disabled
<ul>
<li>__HAL_DAC_GET_IT_SOURCE()</li>
</ul></li>
<li>HAL_DACEx_TriangleWaveGeneration() update to use DAC CR bit mask definition</li>
<li>HAL_DACEx_NoiseWaveGeneration() update to use DAC CR bit mask definition</li>
</ul></li>
<li><strong>HAL CAN</strong> update
<ul>
<li>CanTxMsgTypeDef structure: update to use uint8_t Data[8] instead of uint32_t Data[8]</li>
<li>CanRxMsgTypeDef structure: update to use uint8_t Data[8] instead of uint32_t Data[8]</li>
</ul></li>
<li><strong>HAL RTC</strong> update
<ul>
<li>Update to use CMSIS mask definition instead of hardcoded values (EXTI_IMR_IM17, EXTI_IMR_IM19..)</li>
</ul></li>
<li><strong>HAL LTDC</strong> update
<ul>
<li>LTDC_SetConfig() update to allow the drawing of partial bitmap in active layer.</li>
</ul></li>
<li><strong>HAL USART</strong> update
<ul>
<li>HAL_USART_Init() fix USART baud rate configuration issue: USART baud rate is twice Higher than expected</li>
</ul></li>
<li><strong>HAL SMARTCARD</strong> update
<ul>
<li>HAL_SMARTCARD_Transmit_IT() update to force the disable for the ERR interrupt to avoid the OVR interrupt</li>
<li>HAL_SMARTCARD_IRQHandler() update check condition for transmission end</li>
<li>Clean up: remove the following literals that aren’t used in smartcard mode
<ul>
<li>SMARTCARD_PARITY_NONE</li>
<li>SMARTCARD_WORDLENGTH_8B</li>
<li>SMARTCARD_STOPBITS_1</li>
<li>SMARTCADR_STOPBITS_2</li>
</ul></li>
</ul></li>
<li><strong>HAL SPI</strong> update
<ul>
<li>HAL_SPI_Transmit_DMA()/HAL_SPI_Receive_DMA()/HAL_SPI_TarnsmitReceive_DMA() update to unlock the process before enabling the SPI peripheral</li>
<li>HAL_SPI_Transmit_DMA() update to manage correctly the DMA RX stream in SPI Full duplex mode</li>
<li>Section SPI_Exported_Functions_Group2 update to remove duplication in *.chm UM</li>
</ul></li>
<li><strong>HAL CRYP</strong> update
<ul>
<li>Update to manage multi instance:
<ul>
<li>Add new parameter Instance in the CRYP_HandleTypeDef Handle structure.</li>
<li>Add new parameter in all HAL CRYP macros
<ul>
<li>example: __HAL_CRYP_ENABLE() updated by __HAL_CRYP_ENABLE(__HANDLE__)</li>
</ul></li>
</ul></li>
</ul></li>
<li><strong>HAL DCMI</strong> update
<ul>
<li>Add an extension driver stm32f4xx_hal_dcmi_ex.c/h to manage the support of new Black and White feature</li>
<li>Add __weak attribute for HAL_DCMI_Init() function and add a new implementation in the extension driver to manage the black and white configuration only available in the STM32F446xx devices.</li>
<li>Move DCMI_InitTypeDef structure to extension driver and add the following new fields related to black and white feature: ByteSelectMode, ByteSelectStart, LineSelectMode and LineSelectStart</li>
</ul></li>
<li><strong>HAL PCD</strong> update
<ul>
<li>Add the support of LPM feature
<ul>
<li>add PCD_LPM_StateTypeDef enum</li>
<li>update PCD_HandleTypeDef structure to support the LPM feature</li>
<li>add new functions HAL_PCDEx_ActivateLPM(), HAL_PCDEx_DeActivateLPM() and HAL_PCDEx_LPM_Callback() in the stm32f4xx_hal_pcd_ex.h/.c files</li>
</ul></li>
</ul></li>
<li><strong>HAL TIM</strong> update
<ul>
<li>Add TIM_TIM11_SPDIFRX define</li>
</ul></li>
<li><strong>HAL SAI</strong> update
<ul>
<li>Add stm32f4xx_hal_sai_ex.h/.c files for the SAI_BlockSynchroConfig() and the SAI_GetInputClock() management</li>
<li>Add new defines HAL_SAI_ERROR_AFSDET, HAL_SAI_ERROR_LFSDET, HAL_SAI_ERROR_CNREADY, HAL_SAI_ERROR_WCKCFG, HAL_SAI_ERROR_TIMEOUT in the SAI_Error_Code group</li>
<li>Add new defines SAI_SYNCEXT_DISABLE, SAI_SYNCEXT_IN_ENABLE, SAI_SYNCEXT_OUTBLOCKA_ENABLE, SAI_SYNCEXT_OUTBLOCKB_ENABLE for the SAI External synchronization</li>
<li>Add new defines SAI_I2S_STANDARD, SAI_I2S_MSBJUSTIFIED, SAI_I2S_LSBJUSTIFIED, SAI_PCM_LONG and SAI_PCM_SHORT for the SAI Supported protocol</li>
<li>Add new defines SAI_PROTOCOL_DATASIZE_16BIT, SAI_PROTOCOL_DATASIZE_16BITEXTENDED, SAI_PROTOCOL_DATASIZE_24BIT and SAI_PROTOCOL_DATASIZE_32BIT for SAI protocol data size</li>
<li>Add SAI Callback prototype definition</li>
<li>Update SAI_InitTypeDef structure by adding new fields: SynchroExt, Mckdiv, MonoStereoMode, CompandingMode, TriState</li>
<li>Update SAI_HandleTypeDef structure:
<ul>
<li>remove uint16_t <em>pTxBuffPtr, </em>pRxBuffPtr, TxXferSize, RxXferSize, TxXferCount and RxXferCount and replace them respectively by uint8_t *pBuffPtr, uint16_t XferSize and uint16_t XferCount</li>
<li>add mutecallback field</li>
<li>add struct __SAI_HandleTypeDef *hsai field</li>
</ul></li>
<li>Remove SAI_CLKSOURCE_PLLR and SAI_CLOCK_PLLSRC defines</li>
<li>Add SAI_CLKSOURCE_NA define</li>
<li>Add SAI_AUDIO_FREQUENCY_MCKDIV define</li>
<li>Add SAI_SPDIF_PROTOCOL define</li>
<li>Add SAI_SYNCHRONOUS_EXT define</li>
<li>Add new functions HAL_SAI_InitProtocol(), HAL_SAI_Abort(), HAL_SAI_EnableTxMuteMode(), HAL_SAI_DisableTxMuteMode(), HAL_SAI_EnableRxMuteMode(), HAL_SAI_DisableRxMuteMode()</li>
<li>Update HAL_SAI_Transmit(), HAL_SAI_Receive(), HAL_SAI_Transmit_IT(), HAL_SAI_Receive_IT(), HAL_SAI_Transmit_DMA(), HAL_SAI_Receive_DMA() functions to use <strong>uint8_t <em>pData<strong> instead of </strong>uint16_t </em>pData</strong> –&gt; <strong>This update is mainly impacting the compatibility with previous driver version.</strong></li>
</ul></li>
<li><strong>HAL I2S</strong> update
<ul>
<li>Split the following functions between Generic and Extended API based on full duplex management and add the attribute __weak in the Generic API
<ul>
<li>HAL_I2S_Init(), HAL_I2S_DMAPause(), HAL_I2S_DMAStop(), HAL_I2S_DMAResume(), HAL_I2S_IRQHandle()</li>
</ul></li>
<li>Move the following static functions from generic to extension driver
<ul>
<li>I2S_DMARxCplt() and I2S_DMATxCplt()</li>
</ul></li>
<li>Remove static attribute from I2S_Transmit_IT() and I2S_Receive_IT() functions</li>
<li>Move I2SxEXT() macro to extension file</li>
<li>Add I2S_CLOCK_PLLR and I2S_CLOCK_PLLSRC defines for I2S clock source</li>
<li>Add new function I2S_GetInputClock()</li>
</ul></li>
<li><strong>HAL LL FMC</strong> update
<ul>
<li>Add WriteFifo and PageSize fields in the FMC_NORSRAM_InitTypeDef structure</li>
<li>Add FMC_PAGE_SIZE_NONE, FMC_PAGE_SIZE_128, FMC_PAGE_SIZE_256, FMC_PAGE_SIZE_1024, FMC_WRITE_FIFO_DISABLE, FMC_WRITE_FIFO_ENABLE defines</li>
<li>Update FMC_NORSRAM_Init(), FMC_NORSRAM_DeInit() and FMC_NORSRAM_Extended_Timing_Init() functions</li>
</ul></li>
<li><strong>HAL LL USB</strong> update
<ul>
<li>Update USB_OTG_CfgTypeDef structure to support LPM, lpm_enable field added</li>
<li>Update USB_HostInit() and USB_DevInit() functions to support the VBUS Sensing B activation</li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section3" aria-hidden="true"> <label for="collapse-section3" aria-hidden="true">V1.2.0 / 26-December-2014</label>
<div>
<h2 id="main-changes-30">Main Changes</h2>
<ul>
<li><strong>Maintenance release to fix known defects and enhancements implementation</strong></li>
<li><strong>Macros and literals renaming to ensure compatibles across STM32 series</strong>, backward compatibility maintained thanks to new added file stm32_hal_legacy.h under /Inc/Legacy</li>
<li>Add *.chm UM for all drivers, a UM is provided for each superset RPN</li>
<li>Update drivers to be C++ compliant</li>
<li>Several update on source code formatting, for better UM generation (i.e. Doxygen tags updated)</li>
<li><strong>Two changes done on the HAL requires an update on the application code based on HAL V1.1.0</strong>
<ul>
<li>LSI_VALUE constant has been corrected in stm32f4xx_hal_conf.h file, its value changed from 40 KHz to 32 KHz</li>
<li>UART, USART, IRDA and SMARTCARD (referenced as PPP here below) drivers: in DMA transmit process, the code has been updated to avoid waiting on TC flag under DMA ISR, PPP TC interrupt is used instead. Below the update to be done on user application:
<ul>
<li>Configure and enable the USART IRQ in HAL_PPP_MspInit() function</li>
<li>In stm32f4xx_it.c file, PPP_IRQHandler() function: add a call to HAL_PPP_IRQHandler() function</li>
</ul></li>
</ul></li>
<li><strong>HAL generic</strong> update
<ul>
<li>stm32f4xx_hal_def.h
<ul>
<li>Update NULL definition to fix C++ compilation issue</li>
<li>Add UNUSED() macro</li>
<li>Add a new define __NOINLINE to be used for the no inline code independent from tool chain</li>
</ul></li>
<li>stm32f4xx_hal_conf_template.h
<ul>
<li>LSI_VALUE constant has been corrected, its value changed from 40 KHz to 32 KHz</li>
</ul></li>
<li>Update all macros and literals naming to be uper case</li>
<li>ErrorCode parameter in PPP_HandleTypeDef structure updated to uint32_t instead of enum HAL_PPP_ErrorTypeDef</li>
<li>Remove the unused FLAG and IT assert macros</li>
</ul></li>
<li><strong>HAL ADC</strong> update
<ul>
<li>Fix temperature sensor channel configuration issue for STM32F427/437xx and STM32F429/439xx devices</li>
</ul></li>
<li><strong>HAL DAC</strong> update
<ul>
<li>HAL_DAC_ConfigChannel(): update the access to the DAC peripheral registers via the hdac handle instance</li>
<li>HAL_DAC_IRQHandler(): update to check on both DAC_FLAG_DMAUDR1 and DAC_FLAG_DMAUDR2</li>
<li>HAL_DACEx_NoiseWaveGenerate(): update to reset DAC CR register before setting the new DAC configuration</li>
<li>HAL_DACEx_TriangleWaveGenerate(): update to reset DAC CR register before setting the new DAC configuration</li>
</ul></li>
<li><strong>HAL CAN</strong> update
<ul>
<li>Unlock the CAN process when communication error occurred</li>
</ul></li>
<li><strong>HAL CORTEX</strong> update
<ul>
<li>Add new macro IS_NVIC_DEVICE_IRQ() to check on negative values of IRQn parameter</li>
</ul></li>
<li><p><strong>HAL CRYP</strong> update</p>
<ul>
<li>HAL_CRYP_DESECB_Decrypt_DMA(): fix the inverted pPlainData and pCypherData parameters issue</li>
<li>CRYPEx_GCMCCM_SetInitVector(): remove the IVSize parameter as the key length 192bits and 256bits are not supported by this version</li>
<li>Add restriction for the CCM Encrypt/Decrypt API’s that only DataType equal to 8bits is supported</li>
<li>HAL_CRYPEx_AESGCM_Finish():
<ul>
<li>Add restriction that the implementation is limited to 32bits inputs data length (Plain/Ciphertext, Header) compared with GCM stadards specifications (800-38D)</li>
<li>Update Size parameter on 32bits instead of 16bits</li>
<li>Fix issue with 16-bit Data Type: update to use intrinsic __ROR() instead of __REV16()</li>
</ul></li>
</ul></li>
<li><p><strong>HAL DCMI</strong> update</p>
<ul>
<li>HAL_DCMI_ConfigCROP(): Invert assert macros to check Y0 and Ysize parameters</li>
</ul></li>
<li><p><strong>HAL DMA</strong> update</p>
<ul>
<li>HAL_DMA_Init(): Update to clear the DBM bit in the SxCR register before setting the new configuration</li>
<li>DMA_SetConfig(): add to clear the DBM bit in the SxCR register</li>
</ul></li>
<li><p><strong>HAL FLASH</strong> update</p>
<ul>
<li>Add “HAL_” prefix in the defined values for the FLASH error code
<ul>
<li>Example: FLASH_ERROR_PGP renamed by <strong>HAL</strong>_FLASH_ERROR_PGP</li>
</ul></li>
<li>Clear the Flash ErrorCode in the FLASH_WaitForLastOperation() function</li>
<li>Update FLASH_SetErrorCode() function to use “|=” operant to update the Flash ErrorCode parameter in the FLASH handle</li>
<li>IS_FLASH_ADDRESS(): Update the macro check using ‘&lt;=’ condition instead of ‘&lt;’</li>
<li>IS_OPTIONBYTE(): Update the macro check using ‘&lt;=’ condition instead of ‘&lt;’</li>
<li>Add “FLASH_” prefix in the defined values of FLASH Type Program parameter
<ul>
<li>Example: TYPEPROGRAM_BYTE renamed by <strong>FLASH</strong>_TYPEPROGRAM_BYTE</li>
</ul></li>
<li>Add “FLASH_” prefix in the defined values of FLASH Type Erase parameter
<ul>
<li>Example: TYPEERASE_SECTORS renamed by <strong>FLASH</strong>_TYPEERASE_SECTORS</li>
</ul></li>
<li>Add “FLASH_” prefix in the defined values of FLASH Voltage Range parameter
<ul>
<li>Example: VOLTAGE_RANGE_1 renamed by <strong>FLASH</strong>_VOLTAGE_RANGE_1</li>
</ul></li>
<li>Add “OB_” prefix in the defined values of FLASH WRP State parameter
<ul>
<li>Example: WRPSTATE_ENABLE renamed by <strong>OB</strong>_WRPSTATE_ENABLE</li>
</ul></li>
<li>Add “OB_” prefix in the defined values of the FLASH PCROP State parameter
<ul>
<li>PCROPSTATE_DISABLE updated by <strong>OB</strong>_PCROP_STATE_DISABLE</li>
<li>PCROPSTATE_ENABLE updated by <strong>OB</strong>_PCROP_STATE_ENABLE</li>
</ul></li>
<li>Change “OBEX” prefix by “OPTIONBYTE” prefix in these defines:
<ul>
<li>OBEX_PCROP by OPTIONBYTE_PCROP</li>
<li>OBEX_BOOTCONFIG by OPTIONBYTE_BOOTCONFIG</li>
</ul></li>
</ul></li>
<li><strong>HAL ETH</strong> update
<ul>
<li>Fix macros naming typo
<ul>
<li>Update __HAL_ETH_EXTI_SET_RISING_<strong>EGDE</strong>_TRIGGER() by __HAL_ETH_EXTI_SET_RISING_<strong>EDGE</strong>_TRIGGER()</li>
<li>Update __HAL_ETH_EXTI_SET_FALLING_<strong>EGDE</strong>_TRIGGER() by __HAL_ETH_EXTI_SET_FALLING_<strong>EDGE</strong>_TRIGGER()</li>
</ul></li>
</ul></li>
<li><strong>HAL PWR</strong> update
<ul>
<li>Add new API to manage SLEEPONEXIT and SEVONPEND bits of SCR register
<ul>
<li>HAL_PWR_DisableSleepOnExit()</li>
<li>HAL_PWR_EnableSleepOnExit()</li>
<li>HAL_PWR_EnableSEVOnPend()</li>
<li>HAL_PWR_DisableSEVOnPend()</li>
</ul></li>
<li>HAL_PWR_EnterSTOPMode()
<ul>
<li>Update to clear the CORTEX SLEEPDEEP bit of SCR register before entering in sleep mode</li>
<li>Update usage of __WFE() in low power entry function: if there is a pending event, calling __WFE() will not enter the CortexM4 core to sleep mode. The solution is to made the call below; the first __WFE() is always ignored and clears the event if one was already pending, the second is always applied<br />
__SEV()<br />
__WFE()<br />
__WFE()</li>
</ul></li>
<li>Add new PVD configuration modes
<ul>
<li>PWR_PVD_MODE_NORMAL</li>
<li>PWR_PVD_MODE_EVENT_RISING</li>
<li>PWR_PVD_MODE_EVENT_FALLING</li>
<li>PWR_PVD_MODE_EVENT_RISING_FALLING</li>
</ul></li>
<li>Add new macros to manage PVD Trigger
<ul>
<li>__HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE()</li>
<li>__HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(</li>
<li>__HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE()</li>
<li>__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE()</li>
<li>__HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE()</li>
<li>__HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE()</li>
</ul></li>
<li>PVD macros:
<ul>
<li>Remove the __EXTILINE__ parameter</li>
<li>Update to use prefix "__HAL_PWR_PVD_" instead of prefix "__HAL_PVD"</li>
</ul></li>
<li>Rename HAL_PWR_PVDConfig() by HAL_PWR_ConfigPVD()</li>
<li>Rename HAL_PWREx_ActivateOverDrive() by HAL_PWREx_EnableOverDrive()</li>
<li>Rename HAL_PWREx_DeactivateOverDrive() by HAL_PWREx_DisableOverDrive()</li>
</ul></li>
<li><strong>HAL GPIO</strong> update
<ul>
<li>HAL_GPIO_Init()/HAL_GPIO_DeInit(): add a call to the CMSIS assert macro to check GPIO instance: IS_GPIO_ALL_INSTANCE()</li>
<li>HAL_GPIO_WritePin(): update to write in BSRR register</li>
<li>Rename GPIO_GET_SOURCE() by GET_GPIO_INDEX() and move this later to file stm32f4xx_hal_gpio_ex.h</li>
<li>Add new define for alternate function GPIO_AF5_SPI3 for STM32F429xx/439xx and STM32F427xx/437xx devices</li>
</ul></li>
<li><strong>HAL HASH</strong> update
<ul>
<li>HAL_HASH_MD5_Start_IT(): fix input address management issue<br />
</li>
</ul></li>
<li><strong>HAL RCC</strong> update
<ul>
<li>Rename the following Macros
<ul>
<li>__PPP_CLK_ENABLE() by __HAL_RCC_PPP_CLK_ENABLE()</li>
<li>__PPP_CLK_DISABLE() by __HAL_RCC_PPP_CLK_DISABLE()</li>
<li>__PPP_FORCE_RESET() by __HAL_RCC_PPP_FORCE_RESET()</li>
<li>__PPP_RELEASE_RESET() by __HAL_RCC_PPP_RELEASE_RESET()</li>
<li>__PPP_CLK_SLEEP_ENABLE() by __HAL_RCC_PPP_CLK_SLEEP_ENABLE()</li>
<li>__PPP_CLK_SLEEP_DISABLE() by __HAL_RCC_PPP_CLK_SLEEP_DISABLE()</li>
</ul></li>
<li>IS_RCC_PLLSAIN_VALUE() macro: update the check condition</li>
<li>Add description of RCC known Limitations</li>
<li>Rename HAL_RCC_CCSCallback() by HAL_RCC_CSSCallback()</li>
<li>HAL_RCC_OscConfig() fix issues:
<ul>
<li>Remove the disable of HSE oscillator when HSE_BYPASS is used as system clock source or as PPL clock source</li>
<li>Add a check on HSERDY flag when HSE_BYPASS is selected as new state for HSE oscillator.</li>
</ul></li>
<li>Rename __HAL_RCC_I2SCLK() by __HAL_RCC_I2S_Config()</li>
</ul></li>
<li><p><strong>HAL I2S</strong> update</p>
<ul>
<li>HAL_I2S_Init(): add check on I2S instance using CMSIS macro IS_I2S_ALL_INSTANCE()</li>
<li>HAL_I2S_IRQHandler() update for compliance w/ C++</li>
<li>Add use of tmpreg variable in __HAL_I2S_CLEAR_OVRFLAG() and __HAL_I2S_CLEAR_UDRFLAG() macro for compliance with C++</li>
<li>HAL_I2S_GetError(): update to return uint32_t instead of HAL_I2S_ErrorTypeDef enumeration</li>
</ul></li>
<li><p><strong>HAL I2C</strong> update</p>
<ul>
<li>Update to clear the POS bit in the CR1 register at the end of HAL_I2C_Master_Read_IT() and HAL_I2C_Mem_Read_IT() process</li>
<li>Rename HAL_I2CEx_DigitalFilter_Config() by HAL_I2CEx_ConfigDigitalFilter()</li>
<li>Rename HAL_I2CEx_AnalogFilter_Config() by HAL_I2CEx_ConfigAnalogFilter()</li>
<li>Add use of tmpreg variable in __HAL_I2C_CLEAR_ADDRFLAG() and __HAL_I2C_CLEAR_STOPFLAG() macro for compliance with C++</li>
</ul></li>
<li><strong>HAL IrDA</strong> update
<ul>
<li>DMA transmit process; the code has been updated to avoid waiting on TC flag under DMA ISR, IrDA TC interrupt is used instead. Below the update to be done on user application:
<ul>
<li>Configure and enable the USART IRQ in HAL_IRDA_MspInit() function</li>
<li>In stm32f4xx_it.c file, UASRTx_IRQHandler() function: add a call to HAL_IRDA_IRQHandler() function</li>
</ul></li>
<li>IT transmit process; the code has been updated to avoid waiting on TC flag under IRDA ISR, IrDA TC interrupt is used instead. No impact on user application</li>
<li>Rename Macros: add prefix "__HAL"
<ul>
<li>__IRDA_ENABLE() by __HAL_IRDA_ENABLE()</li>
<li>__IRDA_DISABLE() by __HAL_IRDA_DISABLE()</li>
</ul></li>
</ul></li>
<li>Add new user macros to manage the sample method feature
<ul>
<li>__HAL_IRDA_ONE_BIT_SAMPLE_ENABLE()</li>
<li>__HAL_IRDA_ONE_BIT_SAMPLE_DISABLE()</li>
</ul></li>
<li>HAL_IRDA_Transmit_IT(): update to remove the enable of the parity error interrupt</li>
<li>Add use of tmpreg variable in __HAL_IRDA_CLEAR_PEFLAG() macro for compliance with C++</li>
<li>HAL_IRDA_Transmit_DMA() update to follow the right procedure “Transmission using DMA” in the reference manual
<ul>
<li>Add clear the TC flag in the SR register before enabling the DMA transmit request</li>
</ul></li>
<li><strong>HAL IWDG</strong> update
<ul>
<li>Rename the defined IWDG keys:
<ul>
<li>KR_KEY_RELOAD by IWDG_KEY_RELOAD</li>
<li>KR_KEY_ENABLE by IWDG_KEY_ENABLE</li>
<li>KR_KEY_EWA by IWDG_KEY_WRITE_ACCESS_ENABLE</li>
<li>KR_KEY_DWA by IWDG_KEY_WRITE_ACCESS_DISABLE</li>
</ul></li>
<li>Add new macros __HAL_IWDG_RESET_HANDLE_STATE() and __HAL_IWDG_CLEAR_FLAG()</li>
<li>Update __HAL_IWDG_ENABLE_WRITE_ACCESS() and __HAL_IWDG_DISABLE_WRITE_ACCESS() as private macro</li>
</ul></li>
<li><p><strong>HAL SPI</strong> update</p>
<ul>
<li>HAL_SPI_TransmitReceive_DMA() update to remove the DMA Tx Error Callback initialization when SPI RxOnly mode is selected</li>
<li>Add use of UNUSED(tmpreg) in __HAL_SPI_CLEAR_MODFFLAG(), __HAL_SPI_CLEAR_OVRFLAG(), __HAL_SPI_CLEAR_FREFLAG() to fix “Unused variable” warning with TrueSTUDIO.</li>
<li>Rename Literals: remove “D” from “DISABLED” and “ENABLED”
<ul>
<li>SPI_TIMODE_DISABLED by SPI_TIMODE_DISABLE</li>
<li>SPI_TIMODE_ENABLED by SPI_TIMODE_ENABLE</li>
<li>SPI_CRCCALCULATION_DISABLED by SPI_CRCCALCULATION_DISABLE</li>
<li>SPI_CRCCALCULATION_ENABLED by SPI_CRCCALCULATION_ENABLE</li>
</ul></li>
<li>Add use of tmpreg variable in __HAL_SPI_CLEAR_MODFFLAG(), __HAL_SPI_CLEAR_FREFLAG() and __HAL_SPI_CLEAR_OVRFLAG() macros for compliance with C++<br />
</li>
</ul></li>
<li><p><strong>HAL SDMMC</strong> update</p>
<ul>
<li>IS_SDIO_ALL_INSTANCE() macro moved to CMSIS files</li>
</ul></li>
<li><strong>HAL LTDC</strong> update
<ul>
<li>HAL_LTDC_ConfigCLUT: optimize the function when pixel format is LTDC_PIXEL_FORMAT_AL44
<ul>
<li>Update the size of color look up table to 16 instead of 256 when the pixel format is LTDC_PIXEL_FORMAT_AL44</li>
</ul></li>
</ul></li>
<li><strong>HAL NAND</strong> update
<ul>
<li>Rename NAND Address structure to NAND_AddressTypeDef instead of NAND_AddressTypedef</li>
<li>Update the used algorithm of these functions
<ul>
<li>HAL_NAND_Read_Page()</li>
<li>HAL_NAND_Write_Page()</li>
<li>HAL_NAND_Read_SpareArea()</li>
<li>HAL_NAND_Write_SpareArea()</li>
</ul></li>
<li>HAL_NAND_Write_Page(): move initialization of tickstart before while loop</li>
<li>HAL_NAND_Erase_Block(): add whait until NAND status is ready before exiting this function</li>
</ul></li>
<li><strong>HAL NOR</strong> update
<ul>
<li>Rename NOR Address structure to NOR_AddressTypeDef instead of NOR_AddressTypedef</li>
<li>NOR Status literals renamed
<ul>
<li>NOR_SUCCESS by HAL_NOR_STATUS_SUCCESS</li>
<li>NOR_ONGOING by HAL_NOR_STATUS_ONGOING</li>
<li>NOR_ERROR by HAL_NOR_STATUS_ERROR</li>
<li>NOR_TIMEOUT by HAL_NOR_STATUS_TIMEOUT</li>
</ul></li>
<li>HAL_NOR_GetStatus() update to fix Timeout issue and exit from waiting loop when timeout occurred</li>
</ul></li>
<li><strong>HAL PCCARD</strong> update
<ul>
<li>Rename PCCARD Address structure to HAL_PCCARD_StatusTypeDef instead of CF_StatusTypedef</li>
<li>PCCARD Status literals renamed
<ul>
<li>CF_SUCCESS by HAL_PCCARD_STATUS_SUCCESS</li>
<li>CF_ONGOING by HAL_PCCARD_STATUS_ONGOING</li>
<li>CF_ERROR by HAL_PCCARD_STATUS_ERROR</li>
<li>CF_TIMEOUT by HAL_PCCARD_STATUS_TIMEOUT</li>
</ul></li>
<li>Update “CF” by “PCCARD” in functions, literals and macros</li>
</ul></li>
<li><strong>HAL PCD</strong> update
<ul>
<li>Rename functions
<ul>
<li>HAL_PCD_ActiveRemoteWakeup() by HAL_PCD_ActivateRemoteWakeup()</li>
<li>HAL_PCD_DeActiveRemoteWakeup() by HAL_PCD_DeActivateRemoteWakeup()</li>
</ul></li>
<li>Rename literals
<ul>
<li>USB_FS_EXTI_TRIGGER_RISING_EDGE by USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE</li>
<li>USB_FS_EXTI_TRIGGER_FALLING_EDGE by USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE</li>
<li>USB_FS_EXTI_TRIGGER_BOTH_EDGE() by USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE</li>
<li>USB_HS_EXTI_TRIGGER_RISING_EDGE by USB_OTG_HS_WAKEUP_EXTI_RISING_EDGE</li>
<li>USB_HS_EXTI_TRIGGER_FALLING_EDGE by USB_OTG_HS_WAKEUP_EXTI_FALLING_EDGE</li>
<li>USB_HS_EXTI_TRIGGER_BOTH_EDGE by USB_OTG_HS_WAKEUP_EXTI_RISING_FALLING_EDGE</li>
<li>USB_HS_EXTI_LINE_WAKEUP by USB_OTG_HS_EXTI_LINE_WAKEUP</li>
<li>USB_FS_EXTI_LINE_WAKEUP by USB_OTG_FS_EXTI_LINE_WAKEUP</li>
</ul></li>
</ul></li>
<li>Rename USB EXTI macros (FS, HS referenced as <strong>SUBBLOCK</strong> here below)
<ul>
<li>__HAL_USB_<strong>SUBBLOCK</strong>_EXTI_ENABLE_IT() by __HAL_USB_OTG_<strong>SUBBLOCK</strong>_WAKEUP_EXTI_ENABLE_IT()<br />
</li>
<li>__HAL_USB_<strong>SUBBLOCK</strong>_EXTI_DISABLE_IT() by __HAL_USB_OTG_<strong>SUBBLOCK</strong>_WAKEUP_EXTI_DISABLE_IT()</li>
<li>__HAL_USB_<strong>SUBBLOCK</strong>_EXTI_GET_FLAG() by __HAL_USB_OTG_<strong>SUBBLOCK</strong>_WAKEUP_EXTI_GET_FLAG()</li>
<li>__HAL_USB_<strong>SUBBLOCK</strong>_EXTI_CLEAR_FLAG() by __HAL_USB_OTG_<strong>SUBBLOCK</strong>_WAKEUP_EXTI_CLEAR_FLAG()</li>
<li>__HAL_USB_<strong>SUBBLOCK</strong>_EXTI_SET_RISING_EGDE_TRIGGER() by __HAL_USB_OTG_<strong>SUBBLOCK</strong>_WAKEUP_EXTI_ENABLE_RISING_EDGE()</li>
<li>__HAL_USB_<strong>SUBBLOCK</strong>_EXTI_SET_FALLING_EGDE_TRIGGER() by __HAL_USB_OTG_<strong>SUBBLOCK</strong>_WAKEUP_EXTI_ENABLE_FALLING_EDGE()</li>
<li>__HAL_USB_<strong>SUBBLOCK</strong>_EXTI_SET_FALLINGRISING_TRIGGER() by __HAL_USB_OTG_<strong>SUBBLOCK</strong>_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE()</li>
<li>__HAL_USB_<strong>SUBBLOCK</strong>_EXTI_GENERATE_SWIT() by __HAL_USB_OTG_<strong>SUBBLOCK</strong>_WAKEUP_EXTI_GENERATE_SWIT()<br />
</li>
</ul></li>
<li><strong>HAL RNG</strong> update
<ul>
<li>Add new functions
<ul>
<li>HAL_RNG_GenerateRandomNumber(): to generate a 32-bits random number, return random value in argument and return HAL status.</li>
<li>HAL_RNG_GenerateRandomNumber_IT(): to start generation of the 32-bits random number, user should call the HAL_RNG_ReadLastRandomNumber() function under the HAL_RNG_ReadyCallback() to get the generated random value.</li>
<li>HAL_RNG_ReadLastRandomNumber(): to return the last random value stored in the RNG handle</li>
</ul></li>
<li>HAL_RNG_GetRandomNumber(): return value update (obsolete), replaced by HAL_RNG_GenerateRandomNumber()</li>
<li>HAL_RNG_GetRandomNumber_IT(): wrong implementation (obsolete), replaced by HAL_RNG_GenerateRandomNumber_IT()</li>
<li>__HAL_RNG_CLEAR_FLAG() macro (obsolete), replaced by new __HAL_RNG_CLEAR_IT() macro</li>
<li>Add new define for RNG ready interrupt: RNG_IT_DRDY</li>
</ul></li>
<li><strong>HAL RTC</strong> update
<ul>
<li><p>HAL_RTC_GetTime() and HAL_RTC_GetDate(): add the comment below<br />
* <span class="citation" data-cites="note">@note</span> You must call HAL_RTC_GetDate() after HAL_RTC_GetTime() to unlock the values<br />
* in the higher-order calendar shadow registers to ensure consistency between the time and date values.<br />
* Reading RTC current time locks the values in calendar shadow registers until Current date is read.</p></li>
<li>Rename literals: add prefix "__HAL"
<ul>
<li>FORMAT_BIN by HAL_FORMAT_BIN</li>
<li>FORMAT_BCD by HAL_FORMAT_BCD</li>
</ul></li>
<li>Rename macros (ALARM, WAKEUPTIMER and TIMESTAMP referenced as <strong>SUBBLOCK</strong> here below)
<ul>
<li>__HAL_RTC_EXTI_ENABLE_IT() by __HAL_RTC_<strong>SUBBLOCK</strong>_EXTI_ENABLE_IT()</li>
<li>__HAL_RTC_EXTI_DISABLE_IT() by __HAL_RTC__<strong>SUBBLOCK</strong>_EXTI_DISABLE_IT()</li>
<li>__HAL_RTC_EXTI_CLEAR_FLAG() by __HAL_RTC_<strong>SUBBLOCK</strong>_EXTI_CLEAR_FLAG()</li>
<li>__HAL_RTC_EXTI_GENERATE_SWIT() by __HAL_RTC_<strong>SUBBLOCK</strong>_EXTI_GENERATE_SWIT()</li>
</ul></li>
<li>Add new macros (ALARM, WAKEUPTIMER and TAMPER_TIMESTAMP referenced as SUBBLOCK here below)
<ul>
<li>__HAL_RTC_<strong>SUBBLOCK</strong>_GET_IT_SOURCE()</li>
<li>__HAL_RTC_<strong>SUBBLOCK</strong>_EXTI_ENABLE_EVENT()</li>
<li>__HAL_RTC_<strong>SUBBLOCK</strong>_EXTI_DISABLE_EVENT()</li>
<li>__HAL_RTC_<strong>SUBBLOCK</strong>_EXTI_ENABLE_FALLING_EDGE()</li>
<li>__HAL_RTC_<strong>SUBBLOCK</strong>_EXTI_DISABLE_FALLING_EDGE()</li>
<li>__HAL_RTC_<strong>SUBBLOCK</strong>_EXTI_ENABLE_RISING_EDGE()</li>
<li>__HAL_RTC_<strong>SUBBLOCK</strong>_EXTI_DISABLE_RISING_EDGE()</li>
<li>__HAL_RTC_<strong>SUBBLOCK</strong>_EXTI_ENABLE_RISING_FALLING_EDGE()</li>
<li>__HAL_RTC_<strong>SUBBLOCK</strong>_EXTI_DISABLE_RISING_FALLING_EDGE()</li>
<li>__HAL_RTC_<strong>SUBBLOCK</strong>_EXTI_GET_FLAG()</li>
</ul></li>
</ul></li>
<li><strong>HAL SAI</strong> update
<ul>
<li>Update SAI_STREOMODE by SAI_STEREOMODE</li>
<li>Update FIFO status Level defines in upper case</li>
<li>Rename literals: remove “D” from “DISABLED” and “ENABLED”
<ul>
<li>SAI_OUTPUTDRIVE_DISABLED by SAI_OUTPUTDRIVE_DISABLE</li>
<li>SAI_OUTPUTDRIVE_ENABLED by SAI_OUTPUTDRIVE_ENABLE</li>
<li>SAI_MASTERDIVIDER_ENABLED by SAI_MASTERDIVIDER_ENABLE</li>
<li>SAI_MASTERDIVIDER_DISABLED by SAI_MASTERDIVIDER_DISABLE</li>
</ul></li>
</ul></li>
<li><strong>HAL SD</strong> update
<ul>
<li>Rename SD_CMD_SD_APP_STAUS by SD_CMD_SD_APP_STATUS</li>
<li>SD_PowerON() updated to add 1ms required power up waiting time before starting the SD initialization sequence</li>
<li>SD_DMA_RxCplt()/SD_DMA_TxCplt(): add a call to HAL_DMA_Abort()</li>
<li>HAL_SD_ReadBlocks() update to set the defined DATA_BLOCK_SIZE as SDIO DataBlockSize parameter</li>
<li>HAL_SD_ReadBlocks_DMA()/HAL_SD_WriteBlocks_DMA() update to call the HAL_DMA_Start_IT() function with DMA Datalength set to BlockSize/4 as the DMA is configured in word</li>
</ul></li>
<li><strong>HAL SMARTCARD</strong> update
<ul>
<li>DMA transmit process; the code has been updated to avoid waiting on TC flag under DMA ISR, SMARTCARD TC interrupt is used instead. Below the update to be done on user application:
<ul>
<li>Configure and enable the USART IRQ in HAL_SAMRTCARD_MspInit() function</li>
<li>In stm32f4xx_it.c file, UASRTx_IRQHandler() function: add a call to HAL_SMARTCARD_IRQHandler() function</li>
</ul></li>
<li>IT transmit process; the code has been updated to avoid waiting on TC flag under SMARTCARD ISR, SMARTCARD TC interrupt is used instead. No impact on user application</li>
<li>Rename macros: add prefix "__HAL"
<ul>
<li>__SMARTCARD_ENABLE() by __HAL_SMARTCARD_ENABLE()</li>
<li>__SMARTCARD_DISABLE() by __HAL_SMARTCARD_DISABLE()</li>
<li>__SMARTCARD_ENABLE_IT() by __HAL_SMARTCARD_ENABLE_IT()</li>
<li>__SMARTCARD_DISABLE_IT() by __HAL_SMARTCARD_DISABLE_IT()</li>
<li>__SMARTCARD_DMA_REQUEST_ENABLE() by __HAL_SMARTCARD_DMA_REQUEST_ENABLE()</li>
<li>__SMARTCARD_DMA_REQUEST_DISABLE() by __HAL_SMARTCARD_DMA_REQUEST_DISABLE()</li>
</ul></li>
<li>Rename literals: remove “D” from “DISABLED” and “ENABLED”
<ul>
<li>SMARTCARD_NACK_ENABLED by SMARTCARD_NACK_ENABLE</li>
<li>SMARTCARD_NACK_DISABLED by SMARTCARD_NACK_DISABLE</li>
</ul></li>
<li>Add new user macros to manage the sample method feature
<ul>
<li>__HAL_SMARTCARD_ONE_BIT_SAMPLE_ENABLE()</li>
<li>__HAL_SMARTCARD_ONE_BIT_SAMPLE_DISABLE()</li>
</ul></li>
<li>Add use of tmpreg variable in __HAL_SMARTCARD_CLEAR_PEFLAG() macro for compliance with C++</li>
<li>HAL_SMARTCARD_Transmit_DMA() update to follow the right procedure “Transmission using DMA” in the reference manual
<ul>
<li>Add clear the TC flag in the SR register before enabling the DMA transmit request</li>
</ul></li>
</ul></li>
<li><strong>HAL TIM</strong> update
<ul>
<li>Add TIM_CHANNEL_ALL as possible value for all Encoder Start/Stop APIs Description</li>
<li>HAL_TIM_OC_ConfigChannel() remove call to IS_TIM_FAST_STATE() assert macro</li>
<li>HAL_TIM_PWM_ConfigChannel() add a call to IS_TIM_FAST_STATE() assert macro to check the OCFastMode parameter</li>
<li>HAL_TIM_DMADelayPulseCplt() Update to set the TIM Channel before to call HAL_TIM_PWM_PulseFinishedCallback()</li>
<li>HAL_TIM_DMACaptureCplt() update to set the TIM Channel before to call HAL_TIM_IC_CaptureCallback()</li>
<li>TIM_ICx_ConfigChannel() update to fix Timer CCMR1 register corruption when setting ICFilter parameter</li>
<li>HAL_TIM_DMABurst_WriteStop()/HAL_TIM_DMABurst_ReadStop() update to abort the DMA transfer for the specific TIM channel</li>
<li>Add new function for TIM Slave configuration in IT mode: HAL_TIM_SlaveConfigSynchronization_IT()</li>
<li>HAL_TIMEx_ConfigBreakDeadTime() add an assert check on Break &amp; DeadTime parameters values</li>
<li>HAL_TIMEx_OCN_Start_IT() add the enable of Break Interrupt for all output modes</li>
<li>Add new macros to ENABLE/DISABLE URS bit in TIM CR1 register:
<ul>
<li>__HAL_TIM_URS_ENABLE()</li>
<li>__HAL_TIM_URS_DISABLE()</li>
</ul></li>
<li>Add new macro for TIM Edge modification: __HAL_TIM_SET_CAPTUREPOLARITY()</li>
</ul></li>
<li><strong>HAL UART</strong> update
<ul>
<li>Add IS_LIN_WORD_LENGTH() and IS_LIN_OVERSAMPLING() macros: to check respectively WordLength and OverSampling parameters in LIN mode</li>
<li>DMA transmit process; the code has been updated to avoid waiting on TC flag under DMA ISR, UART TC interrupt is used instead. Below the update to be done on user application:
<ul>
<li>Configure and enable the USART IRQ in HAL_UART_MspInit() function</li>
<li>In stm32f4xx_it.c file, USARTx_IRQHandler() function: add a call to HAL_UART_IRQHandler() function</li>
</ul></li>
<li>IT transmit process; the code has been updated to avoid waiting on TC flag under UART ISR, UART TC interrupt is used instead. No impact on user application</li>
<li>Rename macros:
<ul>
<li>__HAL_UART_ONEBIT_ENABLE() by __HAL_UART_ONE_BIT_SAMPLE_ENABLE()</li>
<li>__HAL_UART_ONEBIT_DISABLE() by __HAL_UART_ONE_BIT_SAMPLE_DISABLE()</li>
</ul></li>
<li>Rename literals:
<ul>
<li>UART_WAKEUPMETHODE_IDLELINE by UART_WAKEUPMETHOD_IDLELINE</li>
<li>UART_WAKEUPMETHODE_ADDRESSMARK by UART_WAKEUPMETHOD_ADDRESSMARK</li>
</ul></li>
<li>Add use of tmpreg variable in __HAL_UART_CLEAR_PEFLAG() macro for compliance with C++</li>
<li>HAL_UART_Transmit_DMA() update to follow the right procedure “Transmission using DMA” in the reference manual
<ul>
<li>Add clear the TC flag in the SR register before enabling the DMA transmit request</li>
</ul></li>
</ul></li>
<li><strong>HAL USART</strong> update
<ul>
<li>DMA transmit process; the code has been updated to avoid waiting on TC flag under DMA ISR, USART TC interrupt is used instead. Below the update to be done on user application:
<ul>
<li>Configure and enable the USART IRQ in HAL_USART_MspInit() function</li>
<li>In stm32f4xx_it.c file, USARTx_IRQHandler() function: add a call to HAL_USART_IRQHandler() function</li>
</ul></li>
<li>IT transmit process; the code has been updated to avoid waiting on TC flag under USART ISR, USART TC interrupt is used instead. No impact on user application</li>
<li>HAL_USART_Init() update to enable the USART oversampling by 8 by default in order to reach max USART frequencies</li>
<li>USART_DMAReceiveCplt() update to set the new USART state after checking on the old state</li>
<li>HAL_USART_Transmit_DMA()/HAL_USART_TransmitReceive_DMA() update to follow the right procedure “Transmission using DMA” in the reference manual
<ul>
<li>Add clear the TC flag in the SR register before enabling the DMA transmit request</li>
</ul></li>
<li>Rename macros:
<ul>
<li>__USART_ENABLE() by __HAL_USART_ENABLE()</li>
<li>__USART_DISABLE() by __HAL_USART_DISABLE()</li>
<li>__USART_ENABLE_IT() by __HAL_USART_ENABLE_IT()</li>
<li>__USART_DISABLE_IT() by __HAL_USART_DISABLE_IT()</li>
</ul></li>
<li>Rename literals: remove “D” from “DISABLED” and “ENABLED”
<ul>
<li>USART_CLOCK_DISABLED by USART_CLOCK_DISABLE</li>
<li>USART_CLOCK_ENABLED by USART_CLOCK_ENABLE</li>
<li>USARTNACK_ENABLED by USART_NACK_ENABLE</li>
<li>USARTNACK_DISABLED by USART_NACK_DISABLE</li>
</ul></li>
<li>Add new user macros to manage the sample method feature
<ul>
<li>__HAL_USART_ONE_BIT_SAMPLE_ENABLE()</li>
<li>__HAL_USART_ONE_BIT_SAMPLE_DISABLE()</li>
</ul></li>
<li>Add use of tmpreg variable in __HAL_USART_CLEAR_PEFLAG() macro for compliance with C++</li>
</ul></li>
<li><strong>HAL WWDG</strong> update
<ul>
<li>Add new parameter in __HAL_WWDG_ENABLE_IT() macro</li>
<li>Add new macros to manage WWDG IT &amp; correction:
<ul>
<li>__HAL_WWDG_DISABLE()</li>
<li>__HAL_WWDG_DISABLE_IT()</li>
<li>__HAL_WWDG_GET_IT()</li>
<li>__HAL_WWDG_GET_IT_SOURCE()</li>
</ul></li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section2" aria-hidden="true"> <label for="collapse-section2" aria-hidden="true">V1.1.0 / 19-June-2014</label>
<div>
<h2 id="main-changes-31">Main Changes</h2>
<ul>
<li>Add support of <strong>STM32F411xE</strong> devices</li>
<li><strong>HAL generic</strong> update
<ul>
<li>Enhance HAL delay and time base implementation
<ul>
<li>Systick timer is used by default as source of time base, but user can eventually implement his proper time base source (a general purpose timer for example or other time source)</li>
<li>Functions affecting time base configurations are declared as __Weak to make override possible in case of other implementations in user file, for more details please refer to HAL_TimeBase example</li>
</ul></li>
<li>Fix flag clear procedure: use atomic write operation “=” instead of ready-modify-write operation “|=” or “&amp;=”</li>
<li>Fix on Timeout management, Timeout value set to 0 passed to API automatically exits the function after checking the flag without any wait</li>
<li>Common update for the following communication peripherals: SPI, UART, USART and IRDA
<ul>
<li>Add DMA circular mode support</li>
<li>Remove lock from recursive process</li>
</ul></li>
<li>Add new macro __HAL_RESET_HANDLE_STATE to reset a given handle state</li>
<li>Add a new attribute for functions executed from internal SRAM and depending from Compiler implementation</li>
<li>When USE_RTOS == 1 (in stm32l0xx_hal_conf.h), the __HAL_LOCK() is not defined instead of being defined empty</li>
<li>Miscellaneous comments and formatting update</li>
<li>stm32f4xx_hal_conf_template.h
<ul>
<li>Add a new define for LSI default value LSI_VALUE</li>
<li>Add a new define for LSE default value LSE_VALUE</li>
<li>Add a new define for Tick interrupt priority TICK_INT_PRIORITY (needed for the enhanced time base implementation)</li>
<li><u>Important Note:</u> aliases has been added for any API naming change, to keep compatibility with previous version</li>
</ul></li>
</ul></li>
<li><strong>HAL GPIO</strong> update
<ul>
<li>Add a new macro __HAL_GPIO_EXTI_GENERATE_SWIT() to manage the generation of software interrupt on selected EXTI line</li>
<li>HAL_GPIO_Init(): use temporary variable when modifying the registers, to avoid unexpected transition in the GPIO pin configuration</li>
<li>Remove IS_GET_GPIO_PIN macro</li>
<li>Add a new function HAL_GPIO_LockPin()</li>
<li>Private Macro __HAL_GET_GPIO_SOURCE renamed into GET_GPIO_SOURCE</li>
<li>Add the support of STM32F411xx devices : add the new Alternate functions values related to new remap added for SPI, USART, I2C</li>
<li>Update the following HAL GPIO macros description: rename EXTI_Linex by GPIO_PIN_x
<ul>
<li>__HAL_GPIO_EXTI_CLEAR_IT()</li>
<li>__HAL_GPIO_EXTI_GET_IT()</li>
<li>__HAL_GPIO_EXTI_CLEAR_FLAG()</li>
<li>__HAL_GPIO_EXTI_GET_FLAG()</li>
</ul></li>
</ul></li>
<li><p><strong>HAL DMA</strong> update</p>
<ul>
<li>Fix in HAL_DMA_PollForTransfer() to:
<ul>
<li>set DMA error code in case of HAL_ERROR status</li>
<li>set HAL Unlock before DMA state update</li>
</ul></li>
</ul></li>
<li><p><strong>HAL DMA2D</strong> update</p>
<ul>
<li>Add configuration of source address in case of A8 or A4 M2M_PFC DMA2D mode</li>
</ul></li>
<li><strong>HAL FLASH</strong> update
<ul>
<li>Functions reorganization update, depending on the features supported by each STM32F4 device</li>
<li>Add new driver (stm32f4xx_hal_flash_ramfunc.h/.c) to manage function executed from RAM, these functions are available only for STM32F411xx Devices
<ul>
<li>FLASH_StopFlashInterfaceClk() : Stop the flash interface while System Run</li>
<li>FLASH_StartFlashInterfaceClk() : Stop the flash interface while System Run</li>
<li>FLASH_EnableFlashSleepMode() : Enable the flash sleep while System Run</li>
<li>FLASH_DisableFlashSleepMode() : Disable the flash sleep while System Run</li>
</ul></li>
</ul></li>
<li><strong>HAL PWR</strong> update
<ul>
<li>HAL_PWR_PVDConfig(): add clear of the EXTI trigger before new configuration</li>
<li>Fix in HAL_PWR_EnterSTANDBYMode() to not clear Wakeup flag (WUF), which need to be cleared at application level before to call this function</li>
<li>HAL_PWR_EnterSLEEPMode()
<ul>
<li>Remove disable and enable of SysTick Timer</li>
<li>Update usage of __WFE() in low power entry function: if there is a pending event, calling __WFE() will not enter the CortexM4 core to sleep mode. The solution is to made the call below; the first __WFE() is always ignored and clears the event if one was already pending, the second is always applied<br />
__SEV()<br />
__WFE()<br />
__WFE()</li>
</ul></li>
<li>Add new macro for software event generation __HAL_PVD_EXTI_GENERATE_SWIT()</li>
<li>Remove the following defines form Generic driver and add them under extension driver because they are only used within extension functions.
<ul>
<li>CR_FPDS_BB: used within HAL_PWREx_EnableFlashPowerDown() function</li>
<li>CSR_BRE_BB: used within HAL_PWREx_EnableBkUpReg() function</li>
</ul></li>
<li>Add the support of STM32F411xx devices add the define STM32F411xE
<ul>
<li>For STM32F401xC, STM32F401xE and STM32F411xE devices add the following functions used to enable or disable the low voltage mode for regulators
<ul>
<li>HAL_PWREx_EnableMainRegulatorLowVoltage()</li>
<li>HAL_PWREx_DisableMainRegulatorLowVoltage()</li>
<li>HAL_PWREx_EnableLowRegulatorLowVoltage()</li>
<li>HAL_PWREx_DisableLowRegulatorLowVoltage()</li>
</ul></li>
<li>For STM32F42xxx/43xxx devices, add a new function for Under Driver management as the macro already added for this mode is not sufficient: HAL_PWREx_EnterUnderDriveSTOPMode()</li>
</ul></li>
</ul></li>
<li><strong>HAL RCC</strong> update
<ul>
<li>In HAL_RCC_ClockConfig() function: update the AHB clock divider before clock switch to new source</li>
<li>Allow to calibrate the HSI when it is used as system clock source</li>
<li>Rename the following macros
<ul>
<li>__OTGFS_FORCE_RESET () by __USB_OTG_FS_FORCE_RESET()</li>
<li>__OTGFS_RELEASE_RESET () by __USB_OTG_FS_RELEASE_RESET()</li>
<li>__OTGFS_CLK_SLEEP_ENABLE () by __USB_OTG_FS_CLK_SLEEP_ENABLE()</li>
<li>__OTGFS_CLK_SLEEP_DISABLE () by __USB_OTG_FS_CLK_SLEEP_DISABLE()</li>
</ul></li>
<li>Add new field PLLI2SM in RCC_PLLI2SInitTypeDef structure, this division factor is added for PLLI2S VCO input clock only STM32F411xE devices =&gt; the FW compatibility is broken vs. STM32F401xx devices</li>
<li>Update HAL_RCCEx_PeriphCLKConfig() and HAL_RCCEx_GetPeriphCLKConfig() functions to support the new PLLI2SM</li>
<li>Add new function to manage the new LSE mode : HAL_RCCEx_SelectLSEMode()</li>
<li>Reorganize the macros depending from Part number used and make them more clear</li>
</ul></li>
<li><p><strong>HAL UART</strong> update</p>
<ul>
<li>Add new macros to control CTS and RTS</li>
<li>Add specific macros to manage the flags cleared only by a software sequence
<ul>
<li>__HAL_UART_CLEAR_PEFLAG()</li>
<li>__HAL_UART_CLEAR_FEFLAG()</li>
<li>__HAL_UART_CLEAR_NEFLAG()</li>
<li>__HAL_UART_CLEAR_OREFLAG()</li>
<li>__HAL_UART_CLEAR_IDLEFLAG()</li>
</ul></li>
<li>Add several enhancements without affecting the driver functionalities
<ul>
<li>Remove the check on RXNE set after reading the Data in the DR register</li>
<li>Update the transmit processes to use TXE instead of TC</li>
<li>Update HAL_UART_Transmit_IT() to enable UART_IT_TXE instead of UART_IT_TC</li>
</ul></li>
</ul></li>
<li><p><strong>HAL USART</strong> update</p>
<ul>
<li>Add specific macros to manage the flags cleared only by a software sequence
<ul>
<li>__HAL_USART_CLEAR_PEFLAG()</li>
<li>__HAL_USART_CLEAR_FEFLAG()</li>
<li>__HAL_USART_CLEAR_NEFLAG()</li>
<li>__HAL_USART_CLEAR_OREFLAG()</li>
<li>__HAL_USART_CLEAR_IDLEFLAG()</li>
</ul></li>
<li>Update HAL_USART_Transmit_IT() to enable USART_IT_TXE instead of USART_IT_TC</li>
</ul></li>
<li><p><strong>HAL IRDA</strong> update</p>
<ul>
<li>Add specific macros to manage the flags cleared only by a software sequence __HAL_IRDA_CLEAR_PEFLAG() __HAL_ IRDA _CLEAR_FEFLAG() __HAL_ IRDA _CLEAR_NEFLAG() __HAL_ IRDA _CLEAR_OREFLAG() __HAL_ IRDA _CLEAR_IDLEFLAG()</li>
<li>Add several enhancements without affecting the driver functionalities
<ul>
<li>Remove the check on RXNE set after reading the Data in the DR register</li>
<li>Update HAL_IRDA_Transmit_IT() to enable IRDA_IT_TXE instead of IRDA_IT_TC</li>
</ul></li>
<li>Add the following APIs used within DMA process
<ul>
<li>HAL_StatusTypeDef HAL_IRDA_DMAPause(IRDA_HandleTypeDef *hirda);</li>
<li>HAL_StatusTypeDef HAL_IRDA_DMAResume(IRDA_HandleTypeDef *hirda);</li>
<li>HAL_StatusTypeDef HAL_IRDA_DMAStop(IRDA_HandleTypeDef *hirda);</li>
<li>void HAL_IRDA_TxHalfCpltCallback(IRDA_HandleTypeDef *hirda);</li>
<li>void HAL_IRDA_RxHalfCpltCallback(IRDA_HandleTypeDef *hirda);</li>
</ul></li>
</ul></li>
<li><p><strong>HAL SMARTCARD</strong> update</p>
<ul>
<li>Add specific macros to manage the flags cleared only by a software sequence
<ul>
<li>__HAL_SMARTCARD_CLEAR_PEFLAG()</li>
<li>__HAL_SMARTCARD_CLEAR_FEFLAG()</li>
<li>__HAL_SMARTCARD_CLEAR_NEFLAG()</li>
<li>__HAL_SMARTCARD_CLEAR_OREFLAG()</li>
<li>__HAL_SMARTCARD_CLEAR_IDLEFLAG()</li>
</ul></li>
<li>Add several enhancements without affecting the driver functionalities
<ul>
<li>Add a new state HAL_SMARTCARD_STATE_BUSY_TX_RX and all processes has been updated accordingly</li>
<li>Update HAL_SMARTCARD_Transmit_IT() to enable SMARTCARD_IT_TXE instead of SMARTCARD_IT_TC</li>
</ul></li>
</ul></li>
<li><strong>HAL SPI</strong> update
<ul>
<li>Bugs fix
<ul>
<li>SPI interface is used in synchronous polling mode: at high clock rates like SPI prescaler 2 and 4, calling HAL_SPI_TransmitReceive() returns with error HAL_TIMEOUT</li>
<li>HAL_SPI_TransmitReceive_DMA() does not clean up the TX DMA, so any subsequent SPI calls return the DMA error</li>
<li>HAL_SPI_Transmit_DMA() is failing when data size is equal to 1 byte</li>
</ul></li>
<li>Add the following APIs used within the DMA process
<ul>
<li>HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi);</li>
<li>HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi);</li>
<li>HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi);</li>
<li>void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi);</li>
<li>void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi);</li>
<li>void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi);</li>
</ul></li>
</ul></li>
<li><strong>HAL RNG</strong> update
<ul>
<li>Add a conditional define to make this driver visible for all STM32F4xx devices except STM32F401xx and STM32F411xx Devices.</li>
</ul></li>
<li><strong>HAL CRC</strong> update
<ul>
<li>These macros are added to read/write the CRC IDR register: __HAL_CRC_SET_IDR() and __HAL_CRC_GET_IDR()</li>
</ul></li>
<li><strong>HAL DAC</strong> update
<ul>
<li>Enhance the DMA channel configuration when used with DAC</li>
</ul></li>
<li><strong>HAL TIM</strong> update
<ul>
<li>HAL_TIM_IRQHandler(): update to check the input capture channel 3 and 4 in CCMR2 instead of CCMR1</li>
<li>__HAL_TIM_PRESCALER() updated to use ‘=’ instead of ‘|=’</li>
<li>Add the following macro in TIM HAL driver
<ul>
<li>__HAL_TIM_GetCompare()</li>
<li>__HAL_TIM_GetCounter()</li>
<li>__HAL_TIM_GetAutoreload()</li>
<li>__HAL_TIM_GetClockDivision()</li>
<li>__HAL_TIM_GetICPrescaler()</li>
</ul></li>
</ul></li>
<li><strong>HAL SDMMC</strong> update
<ul>
<li>Use of CMSIS constants instead of magic values</li>
<li>Miscellaneous update in functions internal coding</li>
</ul></li>
<li><strong>HAL NAND</strong> update
<ul>
<li>Fix issue of macros returning wrong address for NAND blocks</li>
<li>Fix issue for read/write NAND page/spare area</li>
</ul></li>
<li><strong>HAL NOR</strong> update
<ul>
<li>Add the NOR address bank macro used within the API</li>
<li>Update NOR API implementation to avoid the use of NOR address bank hard coded</li>
</ul></li>
<li><strong>HAL HCD</strong> update
<ul>
<li>HCD_StateTypeDef structure members renamed</li>
<li>These macro are renamed
<ul>
<li>__HAL_GET_FLAG(__HANDLE__, __INTERRUPT__) by __HAL_HCD_GET_FLAG(__HANDLE__, __INTERRUPT__)</li>
<li>__HAL_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) by __HAL_HCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__)</li>
<li>__HAL_IS_INVALID_INTERRUPT(__HANDLE__) by __HAL_HCD_IS_INVALID_INTERRUPT(__HANDLE__)</li>
</ul></li>
</ul></li>
<li><strong>HAL PCD</strong> update
<ul>
<li>HAL_PCD_SetTxFiFo() and HAL_PCD_SetRxFiFo() renamed into HAL_PCDEx_SetTxFiFo() and HAL_PCDEx_SetRxFiFo() and moved to the extension files stm32f4xx_hal_pcd_ex.h/.c</li>
<li>PCD_StateTypeDef structure members renamed</li>
<li>Fix incorrect masking of TxFIFOEmpty</li>
<li>stm32f4xx_ll_usb.c: fix issue in HS mode</li>
<li>New macros added
<ul>
<li>__HAL_PCD_IS_PHY_SUSPENDED()</li>
<li>__HAL_USB_HS_EXTI_GENERATE_SWIT()</li>
<li>__HAL_USB_FS_EXTI_GENERATE_SWIT()</li>
</ul></li>
<li>These macro are renamed
<ul>
<li>__HAL_GET_FLAG(__HANDLE__, __INTERRUPT__) by __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__)</li>
<li>__HAL_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) by __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__)</li>
<li>__HAL_IS_INVALID_INTERRUPT(__HANDLE__) by __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__)</li>
<li>__HAL_PCD_UNGATE_CLOCK(__HANDLE__) by __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__)</li>
<li>__HAL_PCD_GATE_CLOCK(__HANDLE___) by __HAL_PCD_GATE_PHYCLOCK(__HANDLE__)</li>
</ul></li>
</ul></li>
<li><strong>HAL ETH</strong> update
<ul>
<li>Update HAL_ETH_GetReceivedFrame_IT() function to return HAL_ERROR if the received packet is not complete</li>
<li>Use HAL_Delay() instead of counting loop</li>
<li>__HAL_ETH_MAC_CLEAR_FLAG() macro is removed: the MACSR register is read only</li>
<li>Add the following macros used to Wake up the device from STOP mode by Ethernet event :
<ul>
<li>__HAL_ETH_EXTI_ENABLE_IT()</li>
<li>__HAL_ETH_EXTI_DISABLE_IT()</li>
<li>__HAL_ETH_EXTI_GET_FLAG()</li>
<li>__HAL_ETH_EXTI_CLEAR_FLAG()</li>
<li>__HAL_ETH_EXTI_SET_RISING_EGDE_TRIGGER()</li>
<li>__HAL_ETH_EXTI_SET_FALLING_EGDE_TRIGGER()</li>
<li>__HAL_ETH_EXTI_SET_FALLINGRISING_TRIGGER()</li>
</ul></li>
</ul></li>
<li><strong>HAL WWDG</strong> update
<ul>
<li>Update macro parameters to use underscore: __XXX__</li>
<li>Use of CMSIS constants instead of magic values</li>
<li>Use MODIFY_REG macro in HAL_WWDG_Init()</li>
<li>Add IS_WWDG_ALL_INSTANCE in HAL_WWDG_Init() and HAL_WWDG_DeInit()</li>
</ul></li>
<li><strong>HAL IWDG</strong> update
<ul>
<li>Use WRITE_REG instead of SET_BIT for all IWDG macros</li>
<li>__HAL_IWDG_CLEAR_FLAG removed: no IWDG flag cleared by access to SR register</li>
<li>Use MODIFY_REG macro in HAL_IWDG_Init()</li>
<li>Add IS_IWDG_ALL_INSTANCE in HAL_IWDG_Init()Add the following macros used to Wake</li>
</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section1" aria-hidden="true"> <label for="collapse-section1" aria-hidden="true">V1.0.0 / 18-February-2014</label>
<div>
<h2 id="main-changes-32">Main Changes</h2>
<ul>
<li>First official release</li>
</ul>
</div>
</div>
</div>
</div>
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