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Makefile.rules.stm32 1.35 KB
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CMSIS_PATH = /home/pfalcon/projects-3rdparty/CMSIS/STM/CMSIS/CM3
# CMSIS includes consist of two sets: "core", supplied by ARM,
# and "device", supplied by silicon vendor.
CMSIS_CORE_INCLUDE = -I$(LIBPERIPHA_PATH)/arm/cortex-m/arm-cmsis/CMSIS/Include
CMSIS_DEVICE_INCLUDE = -I$(CMSIS_PATH)/DeviceSupport/ST/STM32F10x
#CMSIS_STARTUP = $(CMSIS_PATH)/DeviceSupport/ST/STM32F10x/startup/gcc_ride7/startup_stm32f10x_md_vl.s
#CMSIS_SYSTEM = $(CMSIS_PATH)/DeviceSupport/ST/STM32F10x/system_stm32f10x.c
STARTUP = $(CORTEX_STARTUP_PATH)/startup.c
# No need to specify full path to linker script, will be searched in -L
LINKSCRIPT = stm32/stm32-smallest.ld
#DEVICE_INCLUDE = $(CMSIS_CORE_INCLUDE) $(CMSIS_DEVICE_INCLUDE)
DEVICE_INCLUDE = -I$(LIBPERIPHA_PATH) $(CMSIS_CORE_INCLUDE) -DLIBPERIPHA -DCORTEX_M3
CROSS_COMPILE = arm-none-eabi-
#GCC_VER = -4.4
TARGET_INCLUDE = $(DEVICE_INCLUDE) -I$(CORTEX_STARTUP_PATH)
TARGET_FLAGS = -mthumb -mcpu=cortex-m3 -DNO_SYSTEMINIT -D__STM32__ -DSTM32F1 -DSTM32F10X_MD_VL
TARGET_CFLAGS = $(TARGET_FLAGS)
TARGET_LDFLAGS = $(TARGET_CFLAGS) $(TARGET_INCLUDE) --static -nostdlib -nostartfiles -T$(LINKSCRIPT) \
-Wl,--build-id=none $(CMSIS_SYSTEM) $(STARTUP)
LDLIBS = -L$(CORTEX_STARTUP_PATH) -lgcc
.PRECIOUS: $(TARGETDIR)/%.bin
$(TARGETDIR)/%.bin: $(TARGETDIR)/%
$(OBJCOPY) -O binary $^ $@
deploy-%: $(TARGETDIR)/%.bin
st-flash write $^ 0x8000000
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