From 072be71791deab3ff5b115f7d9a26e3e0284df3b Mon Sep 17 00:00:00 2001
From: huangji <huangji@iscas.ac.cn>
Date: Wed, 6 Nov 2024 03:33:41 +0000
Subject: [PATCH] add riscv64 support on DCF

Signed-off-by: huangji <huangji@iscas.ac.cn>
---
 CMakeLists.txt                          |  2 ++
 src/CMakeLists.txt                      |  2 +-
 src/common/cm_concurrency/cm_spinlock.h | 14 +++++++-------
 src/common/cm_concurrency/cm_thread.c   |  3 +++
 src/common/cm_utils/cm_checksum.h       |  2 +-
 src/common/cm_utils/cm_memory.h         |  6 ++++++
 6 files changed, 20 insertions(+), 9 deletions(-)

diff --git a/CMakeLists.txt b/CMakeLists.txt
index 0380198..ee6263d 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -88,6 +88,8 @@ if (UNIX)
         endif (USE_H1620)
 
         add_compile_options(-mtune=cortex-a72 -fsigned-char -g -ggdb3 -march=armv8-a+crc -funwind-tables)
+    elseif (OS_ARCH STREQUAL "riscv64")
+        add_compile_options(-march=rv64g )
     else ()
         add_compile_options(-msse4.2 )
     endif ()
diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
index c42c89c..c316340 100644
--- a/src/CMakeLists.txt
+++ b/src/CMakeLists.txt
@@ -17,7 +17,7 @@ MESSAGE(STATUS ${DD_GETLIBVERSION})
 add_compile_definitions(DCF_LIB_VERSION=${DD_DCF_LIB_VERSION})
 add_compile_definitions(GETLIBVERSION=${DD_GETLIBVERSION})
 add_compile_options(-std=gnu99)
-add_library(dcf SHARED dcf_interface.c ${VERSION_SRC})
+add_library(dcf STATIC dcf_interface.c ${VERSION_SRC})
 target_link_libraries(dcf PRIVATE ${vpp_libsecurec} ${3rd_liblz4} ${3rd_libzstd} ${3rd_libssl} ${3rd_lib_crypto} ${3rd_libjson} common
 utils callback metadata election network replication storage pthread m rt)
 endif ()
diff --git a/src/common/cm_concurrency/cm_spinlock.h b/src/common/cm_concurrency/cm_spinlock.h
index 792a7e0..278392e 100644
--- a/src/common/cm_concurrency/cm_spinlock.h
+++ b/src/common/cm_concurrency/cm_spinlock.h
@@ -37,7 +37,7 @@ extern "C" {
 
 typedef volatile uint32 spinlock_t;
 typedef volatile uint32 ip_spinlock_t;
-#if defined(__arm__) || defined(__aarch64__)
+#if defined(__arm__) || defined(__aarch64__) || defined(__riscv)
 #define GS_INIT_SPIN_LOCK(lock)                       \
     {                                                 \
         __atomic_store_n(&lock, 0, __ATOMIC_SEQ_CST); \
@@ -63,7 +63,7 @@ typedef struct st_spin_statis {
     uint64 fails;
 } spin_statis_t;
 
-#if defined(__arm__) || defined(__aarch64__)
+#if defined(__arm__) || defined(__aarch64__) || defined(__riscv)
 #define fas_cpu_pause()          \
     {                            \
         __asm__ volatile("nop"); \
@@ -98,7 +98,7 @@ static inline void cm_spin_sleep_ex(uint32 tick)
 
 #else
 
-#if defined(__arm__) || defined(__aarch64__)
+#if defined(__arm__) || defined(__aarch64__) || defined(__riscv)
 static inline uint32 cm_spin_set(spinlock_t *ptr, uint32 value)
 {
     uint32 oldvalue = 0;
@@ -145,7 +145,7 @@ static inline void cm_spin_lock(spinlock_t *lock, spin_statis_t *stat)
     }
 
     for (;;) {
-#if defined(__arm__) || defined(__aarch64__)
+#if defined(__arm__) || defined(__aarch64__) || defined(__riscv)
         while (__atomic_load_n(lock, __ATOMIC_SEQ_CST) != 0) {
 #else
         while (*lock != 0) {
@@ -172,7 +172,7 @@ static inline void cm_spin_lock(spinlock_t *lock, spin_statis_t *stat)
     }
 }
 
-#if !defined(__arm__) && !defined(__aarch64__)
+#if !defined(__arm__) && !defined(__aarch64__) && !defined(__riscv)
 static inline void cm_spin_unlock(spinlock_t *lock)
 {
     if (SECUREC_UNLIKELY(lock == NULL)) {
@@ -185,7 +185,7 @@ static inline void cm_spin_unlock(spinlock_t *lock)
 
 static inline bool32 cm_spin_try_lock(spinlock_t *lock)
 {
-#if defined(__arm__) || defined(__aarch64__)
+#if defined(__arm__) || defined(__aarch64__) || defined(__riscv)
     if (__atomic_load_n(lock, __ATOMIC_SEQ_CST) != 0) {
 #else
     if (*lock != 0) {
@@ -202,7 +202,7 @@ static inline bool32 cm_spin_timed_lock(spinlock_t *lock, uint32 timeout_ticks)
     uint32 sleep_times = 0;
 
     for (;;) {
-#if defined(__arm__) || defined(__aarch64__)
+#if defined(__arm__) || defined(__aarch64__) || defined(__riscv)
         while (__atomic_load_n(lock, __ATOMIC_SEQ_CST) != 0) {
 #else
         while (*lock != 0) {
diff --git a/src/common/cm_concurrency/cm_thread.c b/src/common/cm_concurrency/cm_thread.c
index de25657..08d4955 100644
--- a/src/common/cm_concurrency/cm_thread.c
+++ b/src/common/cm_concurrency/cm_thread.c
@@ -296,6 +296,9 @@ uint32 cm_get_current_thread_id(void)
 #define __SYS_GET_SPID 186
 #elif (defined __aarch64__)
 #define __SYS_GET_SPID 178
+#elif (defined __riscv)
+#include<sys/syscall.h>
+#define __SYS_GET_SPID SYS_gettid
 #endif
 #define gettid() syscall(__SYS_GET_SPID)
 
diff --git a/src/common/cm_utils/cm_checksum.h b/src/common/cm_utils/cm_checksum.h
index 85bb9fa..758c917 100644
--- a/src/common/cm_utils/cm_checksum.h
+++ b/src/common/cm_utils/cm_checksum.h
@@ -38,7 +38,7 @@
 #define CM_HAVE_SSE4_2
 #include <intrin.h>
 #define CM_HAVE__CPUID
-#else
+#elif defined(__i386__) || defined(__x86_64__)
 #include <nmmintrin.h>
 #define CM_HAVE_SSE4_2
 #include <cpuid.h>
diff --git a/src/common/cm_utils/cm_memory.h b/src/common/cm_utils/cm_memory.h
index 5a61085..9380b74 100644
--- a/src/common/cm_utils/cm_memory.h
+++ b/src/common/cm_utils/cm_memory.h
@@ -56,6 +56,12 @@ extern "C" {
         __asm__ volatile("dmb ish" ::     \
                              : "memory"); \
     }
+#elif defined(__riscv)
+#define CM_MFENCE                         \
+    {                                     \
+        __asm__ volatile("" ::            \
+                             : "memory"); \
+    }
 #else
 #define CM_MFENCE                         \
     {                                     \
-- 
2.33.0